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Data Center

Cadence Accelerates Digital Twin–Driven Data Center AI Modernization with HPE

Solution will maximize data center and AI factory profitability while delivering…

Corporate
• 3 min read
news story , featured , infrastructure ai , data center , hpe

Corporate News

Honda + Cadence = Physical AI (part 1): What Does “Physical AI” Really Mean?

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The more widely the term …

Corporate
• 7 min read
featured , physical ai , HGR , AI , Honda

Corporate News

Design for AI and AI for Design

The semiconductor industry is experiencing a once-in-a-generation transformation…

Corporate
• 6 min read
Allegro X AI , featured , infrastructure ai , agentic ai , Integrity 3D-IC Platform

Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis
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Blog - Post List
Latest blogs

System, PCB, & Package Design 

Elevating Analysis and Optimization Across Disciplines to New Productivity Levels…

During the launch preparation of our latest set of AI/ML-enabled offerings, I heard…

• 4 min read
Low Power , VCC , machine learning , Artificial Intelligence , Electromagnetic analysis , Signal Integrity , Alberto Sangiovanni-Vincentelli , electromagnetic , Felix , MDAO , AI/ML , thermal

Verification

Modeling Configuration in PSS (Portable Stimulus)

Design patterns for modeling configuration and reconfiguration in PSS (Portable Stimulus…

• 4 min read
configuration , Perspec , portable stimulus , verification

Breakfast Bytes

Fabless: The Transformation of the Semiconductor Industry and How I Wrote the Bo…

Tomorrow it is CadenceLIVE Silicon Valley. If you are attending, I will be there…

• 2 min read
hyperscalar , fabless , books

Breakfast Bytes

Khronos: Open Standards Powering the Future of Embedded Vision

At the recent Embedded Vision Summit, one of the presentations was by Neil Trevett…

• 2 min read
Embedded Vision Summit , Standards , khronos , vision , camera , safety critical

Computational Fluid Dynamics

Best Weekend with McLaren at Indy 500 and Monaco Grand Prix

Indulge yourself into motorsport racing with some info on McLaren racing, the technical…

• 5 min read
Automotive , motorsports , IndyCar series , Pointwise , Grand Prix , Fidelity CFD , CFD Applications , simulation software , mclaren , NUMECA , formula 1

Analog/Custom Design

Training Insights: Three Things You Can Do Now to Sharpen Your Digital Implementation…

The three-day Virtuoso Digital Implementation online training course can get you…

• 2 min read
digital badges , training bytes , Virtuoso , Cadence Education Services , Custom IC Design

カスタムIC／ミックスシグナル

Virtuosity: カスタムIC設計フロー／手法 – 回路レイアウト

カスタム／ミックスドシグナル設計における現在の課題は、高速でシリコン精度の高い手法を持つことです。このブログ・シリーズでは、カスタムICの設計フローと手法の段階についてご紹介します…

• 1 min read
Virtuoso Schematic Editor , Virtuoso Space-based Router , Virtuoso Placer , Layout Suite , Layout , ICADVM20.1 , japanese blog , Custom IC Design , Virtuoso Layout Suite EXL , Virtuoso Layout Suite , IC6.1.8 , Virtuoso Layout Suite XL

Computational Fluid Dynamics

Discover What's New in the Latest Release of Cadence Fidelity CFD

Cadence releases Fidelity CFD version 2022.1, with many new features to speed up…

• 1 min read
CFD , Computational Fluid Dynamics , fluid dynamics , Fidelity CFD , CFD Applications

System, PCB, & Package Design 

This Month in IDA

This month in IDA covers many blogs, both written and video format, that cover thermal…

• 1 min read
in-design analysis , Electromagnetic analysis , Signal Integrity , Thermal Integrity , microwave design

カスタムIC／ミックスシグナル

Virtuoso Meets Maxwell: 製造性と歩留まりの改善

'Virtuoso Meets Maxwell' はVirtuoso RF ソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です…

• less than a min read
fillet , metal density , Virtuoso Meets Maxwell , T connections , Improving Manufacturability and Yield , Virtuoso RF , tapered traces , japanese blog

Computational Fluid Dynamics

Discover 'What’s New' in Engineering Simulation and Analysis with Cadence at the…

To all the analysis and simulation folks out there, if you are on the lookout for…

• 2 min read
CFD , conference , Pointwise , Analysis , system design , engineering , simulation software , Thermal Analysis , NUMECA , NAFEMS

Computational Fluid Dynamics

Fidelity Marine & C-Wizard: Easy-to-Use CFD Software for Marine Engineering

In this on-demand webinar, discover the speed and ease-of-use of Fidelity Marine…

• 1 min read
Marine Engineering , marine design , naval architecture , shipbuilding

Breakfast Bytes

Vacation

Looking for today's Breakfast Bytes? I'm on vacation on a road trip to the Grand…

• less than a min read
vacation

Analog/Custom Design

Knowledge Booster Training Bytes Blogs: Over 2 Years - Time to Look Back

Two years of knowledge booster blogs series, what happened during this time, important…

• 3 min read
Cadence training , training bytes , Cadence Education Services , Custom IC Design , Custom IC

Analog/Custom Design

Spectre Tech Tips: How to Improve the Spectre X Simulation Performance

Simulation performance is a critical factor in the time required for chip design…

• 5 min read
performance , ADE Explorer , performance diagnosis , Virtuoso Analog Design Environment , Spectre , Verifier Run Plan , spectre x , Spectre X Simulator , ADE Assembler , verification

Breakfast Bytes

Sunday Brunch Video for 29th May 2022

https://youtu.be/2F6MIuGFcHA Made in my Mini Cooper Convertible Monday: Embedded…

• less than a min read
sunday brunch

Spotlight Taiwan

Cadence 永續之路：創新不凡 多元共好

關於EDA在永續的發展，你可能不知道的point： 2011 年消費性可攜式SoC晶片的設計成本約為 4,000 萬美元，但如果沒有 1993 年到 2009 年的…

• less than a min read
CFD , innovation , esg , Tensilica , sustainability , taiwanese blog , intelligent system design , CSR

Breakfast Bytes

CadenceLIVE Silicon Valley 2022 Preview

CadenceLIVE Silicon Valley is back as an in-person event for 2022, in the Santa Clara…

• 2 min read
cadencelive silicon valley , cadencelive

RF /マイクロ波設計

μWaveRiders:Cadence AWR Design Environment グラフ表示のヒントとコツ

The seventh in the series of AWR Design Environment Tips and Tricks, this blog highlights…

• 1 min read
RF Simulation , Graph trace , Circuit simulation , AWR Design Environment , Graphing measurements , awr , Graphs , Tips/Tricks , microwave office , Graph axis , japanese blog , Visual System Simulator(VSS)
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