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Corporate News

The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
• 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
• 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA

Corporate News

Honda + Cadence = Physical AI (part 2): Where Physical AI Will Be Won

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The real challenge of physical…

Corporate
• 8 min read
featured , physical ai , HGR , AI , Honda
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Blog - Post List
Latest blogs

Corporate News

VSORA: Redefining AI Inference with New Silicon Architecture

AI inference is rapidly becoming the largest and most demanding segment of the AI…

• 2 min read
data center , AI inference , designed with cadence

Verification

Cadence VLAB at the Embedded World 2026

Just like every year, the Embedded World took place in Nürnberg in mid-March. It…

• 5 min read
Automotive , virtual platforms , vlab , Embedded World

Verification

UCIe Manageability: The Hidden Control Plane of Chiplet Systems

Chiplet-based architectures are quickly becoming the foundation of next-generation…

• 2 min read
ucie , Verification IP , multi-die , VIP

Artificial Intelligence (AI)

Cadence Brings Chip Verification to the Next Level with AI Agents

By Karl Freund of Cambrian-AI Research , sponsored by Cadence Introduction The…

• 10 min read
artificial intelligence , ChipStack AI SuperAgent , ChipStack , featured , agentic ai , AI

Analog/Custom Design

Animate in Virtuoso Studio: Accelerating Analog Layout Prototyping with It!

The blog introduces Animate in Virtuoso Studio as a powerful analog virtual prototyping…

• 7 min read
IC25.1 , Virtuoso Layout EXL , Layout , Animate , Custom IC Design , Virtuoso Layout Suite , Custom IC

Digital Design

Debugging Unconstrained Paths in Tempus

This blog walks through practical debugging scenarios—from false paths and clock…

• 2 min read
Digital Design and Signoff , timing debug , Timing Optimization , Timing analysis , Tempus Timing Signoff Solution , cadence learning and support

Corporate News

Cadence Recognized as a Platinum Employer on the Where You Work Matters List

We're proud to be named a 2026 Platinum Employer on the Where You Work Matters List…

• 1 min read
news story , featured , Careers , Where You Work Matters , life at cadence

Digital Design

Your Skills Deserve a Passport: Showcase Your Expertise with Digital Badges

In this fast‑changing digital era, every learning milestone you achieve adds a new…

• 3 min read
digital badge , Training and Support , training , training bytes , certification , online training

Verification

Shift Verification Left: AI Tools for Faster, Smarter Chip Design

Originally written by Hamid Shojaei, Co-Founder of ChipStack and now Distinguished…

• 7 min read
ChipStack , featured , EDA , ChipStack AI Super Agent , AI , verification

System, PCB, & Package Design 

Online Panel: Chiplets and 3D Heterogenous Integration

Microwave Journal and Signal Integrity Journal recently spearheaded an online panel…

• 3 min read
PCB , Sigrity and Systems Analysis , Celsius Thermal Solver , PDN , Allegro X PCB Editor , 3D-IC , Integrity , Power Integrity , IC package design , Signal Integrity , Sigrity , Clarity 3D Solver

Verification

What Makes LPDDR6 a Key Technological Advancement for DRAM Memory Technologies

Low-power DDR SDRAM is one of the most widely used memory types in the semiconductor…

• 4 min read
Storage Technology , Verification IP , Memory , LPDDR , LOW POWER DRAM , JEDEC , DRAM , memory models , Lpddr6

SoC and IP

Understanding the Difference Between a Monolithic SoC and a Chiplet

I am often asked, "What is the difference between a traditional SoC die and a chiplet…

• 7 min read
Design IP , chiplets , OCP FCSA , ip cores , lpddr5x , Arm CSA , CHI-C2C

中文技术专区

喜讯 | Cadence Palladium Z3 与 Protium X3 系统荣膺 2025 全球电子成就奖

在全球电子设计加速演进的浪潮中，Cadence 楷登电子再度以卓越的创新实力赢得行业瞩目。 由全球电子技术领域知名媒体集团 ASPENCORE 举办的全球电子成就奖颁奖典礼于…

• less than a min read
Protium , Palladium

中文技术专区

Cadence Tensilica Vision DSP 助力爱芯元智，提升人形机器人与物联网应用性能

近日，楷登电子Cadence与边缘 SoC 领军企业爱芯元智共同宣布，爱芯元智在其最新的 AX8850N 平台上集成了 Cadence® Tensilica® Vision…

• less than a min read
DSP , IP , Tensilica

中文技术专区

快讯 | Cadence Conformal AI Studio 升级 AI 驱动的 SoC 逻辑验证流程

Cadence 以 Conformal AI Studio 结合强化学习与分布式架构，全面升级 LEC、低功耗验证和 ECO，在 AI 设计时代开创新范式。 …

• less than a min read
Conformal AI ECO

Analog/Custom Design

Unifying Electronic and Photonic Circuit Simulation

The Need For Photonics The proliferation of artificial intelligence, the rollout…

• 1 min read
news story , featured , Virtuoso Studio , Spectre Photonics , analog , Spectre Circuit Simulator , Virtuoso , photonics , Circuit Design , Custom IC

Data Center

Accelerating the AI Factory: Switch and Cadence Redefine High-Density Design

"We are redefining what is possible for next-gen AI factories with our patent-pending…

• 4 min read
featured , data center , Data Center Design , digital twin , AI factory

Data Center

Digital Twins Enable the Next Era of AI Infrastructure

Artificial intelligence (AI) is reshaping the data center. As AI workloads scale…

• 5 min read
featured , Data Center Design , Data Center Operations , data center digital twin , AI factory , data center software , Data Center architecture , data centers

Corporate News

The Engineering Workforce Multiplier: How Agentic AI Is Shaping Silicon Design

A virtual engineering organization coordinates reasoning and intent across design…

• 3 min read
ChipStack , featured , agentic ai , GTC , NVIDIA , ChipStack AI Super Agent
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