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Cadence Certifies AI-Driven Reference Flows for Intel 18A-P and Intel 14A

The expanded Cadence-Intel Foundry collaboration delivers silicon-proven digital…

Corporate
• 3 min read
DAC , Design IP , featured , DAC 2026 , AI-Driven Design

Corporate News

The Autonomous Chip-to-System Engineer Has Arrived

How Cadence, in collaboration with NVIDIA, is building the industry's first silicon…

Corporate
• 4 min read
AuraStack AI Super Agent , DAC , featured , agentic ai , NVIDIA

Corporate News

Cadence’s Agentic AI Design Vision Takes Center Stage at DAC

AI infrastructure demands are changing what semiconductor design must solve. The…

Corporate
• 4 min read
AuraStack AI Super Agent , featured , agentic ai , DAC 2026 , ChipStack AI Super Agent

Corporate News

AI Infrastructure Starts Beyond the Chip

Why Advanced Packaging and PCB Design Have Become the Next Frontier of Innovation…

Corporate
• 8 min read
chip , featured , AI infrastructure , agentic ai , packaging
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Latest blogs

Breakfast Bytes

Palladium Z2 Wins an ACE Award

A few years ago, the Palladium Z1 Enterprise Emulation Platform won an ACE award…

• 2 min read

Academic Network

Cadence Great Support to Taiwan National IC Design Competition

The Taiwan National IC Design was a great opportunity for Cadence and the Academic…

• 1 min read
Taiwan , Cadence Academic Network

System, PCB, & Package Design 

Cadence and Nvidia to Address EMC Simulation Challenges Using GPU Computing at EMC…

If you have ever had your car audio impacted by driving by power lines, you have…

• 1 min read
EMI , Clarity 3D Transient Solver , GPU , FDTD , NVIDIA , EMC , EMCLive , time domain solver

System, PCB, & Package Design 

BoardSurfers: Exchanging Layer Stackup Data Using IPC-2581

Sharing design intent and stackup information with your manufacturer at the beginning…

• 4 min read
17.4 , PCB manufacturing , Gerber , BoardSurfers , IPC , IPC-2581 Consortium , 17.4-2019 , PCB design , PCB data exchnage , Allegro PCB Editor , IPC-2581 , PCB standards , Allegro

Breakfast Bytes

Jasper User Group Preview

I have been going to the Jasper User Group for years. Before Cadence acquired Jasper…

• 1 min read
Jasper User Group , JUG , formal , JasperGold , verification

RF /マイクロ波設計

マイクロ波製品ダイジェスト（MPD）の記事でAWR Design Environment V16ソフトウェアを紹介

5G無線システムと接続されるデバイスは、今日、考えられるすべての業界で急増しています。運転技術のリーダーは、性能、サイズ、およびコストによって定義および差別化されたRF対応の製品の市場機会を活用しています…

• less than a min read
5G , Virtuoso RF Designer , AWR Design Environment , awr , Multiphysics analysis , RF design , AWR Media Alert , japanese blog , Allegro PCB Designer , IC design , Wireless Communication

RF Engineering

Cadence AWR Design Environment Empowers RF/Microwave System Design

Microwave Product Digest (MPD) Article Features AWR Design Environment V16 Software…

• 1 min read
5G , Virtuoso RF Designer , AWR Design Environment , awr , Multiphysics analysis , RF design , AWR Media Alert , Allegro PCB Designer , IC design , Wireless Communication

Breakfast Bytes

Designing Planet-Scale Video Chips on Google Cloud

In the last couple of months, I have attended two presentations about Google's video…

• 4 min read
google cloud , google

Breakfast Bytes

Sunday Brunch Video for 31st October 2021

https://youtu.be/GuGgaH72-6U Made at Calistoga in Napa CA (camera Carey Guo) Monday…

• less than a min read
sunday brunch

Computational Fluid Dynamics

This Week in CFD

Despite this being the Halloween time of year, this week's roundup of CFD news isn…

• less than a min read
CFD , Pointwise , Computational Fluid Dynamics , Mesh Generation , Omnis

System, PCB, & Package Design 

IC Packagers: Module Support in IC Package Design

It is quite common to reuse memory stacks across designs. These memory stacks are…

• 2 min read
APD , IC Packaging & SiP design , IC Packagers , Allegro Package Designer , 17.4-2019

Verification

Why is Ethernet Time-sensitive Networking (TSN) Adaptation So Rapid in the Automotive…

At a particular point in time, the automotive industry continued to add more and…

• 1 min read
Automotive , Verification IP , SoC verification , IP verification , Ethernet VIP , Functional Verification , VIP , Ethernet standards , Automotive Ethernet , TSN

Breakfast Bytes

Always Listening, HiFi 1 DSP

Today, at the Linley Processor Conference, we announced the latest addition to the…

• 4 min read
always on , audio , hifi 1 , Tensilica , hifi 1 dsp , earbuds

Life at Cadence

My Life at Cadence: Guillaume Foix

Cadence was recently ranked #7 on Newsweek’s Most Loved Workplaces list for 2021…

• 1 min read
Insights on Culture , Culture , cadence , GPTW , my life at cadence , life at cadence , cadence emea

Breakfast Bytes

October Update: GPTW, Intel Fabs, Apple, and More

These monthly updates normally occur on the last Friday of the month, but that is…

• 5 min read
Intel , Apple , semi , Arteris , apple m1

カスタムIC／ミックスシグナル

Virtuoso Meets Maxwell: EMX Planar 3D Solverでのメッシュの表示

'Virtuoso Meets Maxwell' はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です…

• less than a min read
Virtuoso 3D Viewer , Virtuoso Meets Maxwell , Virtuoso RF Solution , Virtuoso RF , Layers Assistant , EMX Models , Electromagnetic analysis , Virtuoso , EMX , japanese blog , Custom IC Design , EMX Solver , Virtuoso Layout Suite , Custom IC , 3D Mesh

System, PCB, & Package Design 

BoardSurfers: Training Insights: Manually Placing Components in Allegro PCB Edit…

Component placement is one of the most critical aspects of PCB designing. As the…

• 4 min read
BoardSurfers , 17.4-2019 , PCB design , Training Insights , Allegro PCB Editor , Allegro

定制IC芯片设计

Virtuoso Meets Maxwell：通过库实现系统分析和物理实现

欢迎阅读这篇博文了解如何创建组件和padstack库，以用于以Virtuoso 平台为驱动的多工艺流程。本文所描述的工具类似图书管理员的工作，它们必须通过各种途径来组装组件IP…

• 1 min read
Technology Independent Layout Pcell , Unified Library , Virtuoso Layout EXL , Virtuoso Meets Maxwell , Virtuoso System Design Environment , Virtuoso RF Solution , Virtuoso RF , Virtuoso MultiTech , Electromagnetic analysis , librarian , SiP Layout Option , ICADVM20.1 , Cadence SiP Layout , TILP , Chinese blogs , VMM

Breakfast Bytes

TSMC OIP: 3DFabric and Integrity 3D-IC

Today is TSMC's OIP (or, to give it its full name, TSMC 2021 Online OIP Ecosystem…

• 3 min read
OIP , Integrity , TSMC , Innovus , integrity 3d-ic , 3dfabric
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