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Latest Blog Posts

  • μWaveRiders: Setting Up a Successful AWR Design Environment Design - Layout and Component Libraries

    RF Engineering: μWaveRiders: Setting Up a Successful AWR Design Environment Design - Layout and Component Libraries

    TeamAWR
    TeamAWR
    When starting a new design, it's important to take the time to consider design recommendations that prevent problems that can arise later in the design cycle. This two-part compilation of guidelines for starting a new design is the result of years of Cadence AWR Design Environment platform Support experience with designs. Pre-design decisions for user interface, simulation, layout, and library configuration lay the groundwork…
    • 16 Dec 2022
  • Training Insights - RTL-to-GDSII Lab: Just One Click to Increase Your Confidence in Handling Tools!

    Digital Design: Training Insights - RTL-to-GDSII Lab: Just One Click to Increase Your Confidence in Handling Tools!

    P Saisrinivas
    P Saisrinivas

    Are you struggling to run the RTL2GDSII labs? Want to speed up your learning time? No worries, watch the lab demos created for each module of the flow by clicking the  play button.  

    At the end of the Cadence_RTL-to-GDSII_Flow 4_0 online course is a lab manual that instructs and tests topics first introduced in the lecture.

    Lab instructions are also available in video format to speed up the learning time. These demo videos…

    • 16 Dec 2022
  • Photonics: Riding the Waves

    Breakfast Bytes: Photonics: Riding the Waves

    Paul McLellan
    Paul McLellan
    Coming up on January 11th is our annual photonics event. This year it is called CadenceCONNECT: Photonics - Riding the Waves Along the Spectrum. As usual, the event will take place in the building 10 auditorium (just follow the event signs)...
    • 16 Dec 2022
  • Virtuosity: Annotating Scalar Outputs for Single-Point Simulation in Virtuoso Visualization and Analysis XL

    Analog/Custom Design: Virtuosity: Annotating Scalar Outputs for Single-Point Simulation in Virtuoso Visualization and Analysis XL

    Udit Rajput
    Udit Rajput
    Can scalar outputs for single-point simulation be annotated in the graph window of Virtuoso Visualization and Analysis XL? Yes, now, you can! How? Read through this blog to know more.
    • 15 Dec 2022
  • Ascent: Training Insights: Controlling Design Versions in Allegro System Capture

    System, PCB, & Package Design : Ascent: Training Insights: Controlling Design Versions in Allegro System Capture

    AsadMakandar
    AsadMakandar
    The Version Control feature in Allegro® System Capture lets you track every modification in the design database. While working on a design, if you change your mind or make any mistakes, you can revert to any clean previous version of the design. ...
    • 15 Dec 2022
  • EV Maritime Is Creating Better Boats for a Better World

    Life at Cadence: EV Maritime Is Creating Better Boats for a Better World

    Corporate
    Corporate
    EV Maritime is a New Zealand-based marine technology business, decarbonizing the harbor cities of the world with its high-performance electric boats. Their slogan is “a better ferry future,” and they’re looking to help cities transf...
    • 15 Dec 2022
  • RISC-V Summit 2022

    Breakfast Bytes: RISC-V Summit 2022

    Paul McLellan
    Paul McLellan
    The RISC-V Summit took place in December. It was in person and virtual. Clearly, in the world of processors, RISC-V is the most important development of the decade. It has already taken over academia completely. It has a huge footprint in the embedde...
    • 15 Dec 2022
  • Words and Their Impact on Diversity, Equity, and Inclusion

    Life at Cadence: Words and Their Impact on Diversity, Equity, and Inclusion

    Jonaki
    Jonaki
    An employee's perspective about diversity, equity, and inclusion: The Words Matter Initiative focuses on language and terminology to ensure all communications are respectful and reflect the DEI values that are supported and celebrated at Cadence.
    • 15 Dec 2022
  • CES 2023 Preview: Come and See Us in the Venetian

    Breakfast Bytes: CES 2023 Preview: Come and See Us in the Venetian

    Paul McLellan
    Paul McLellan
    It's nearly a New Year, and as usual, CES (what used to be called the Consumer Electronics Show,  but now just goes by its initials) will take place Thursday, January 5  - 8. Cadence will be there January 5 - 7. Hours are 10:00am to 6:00pm ...
    • 14 Dec 2022
  • Knowledge Booster Training Bytes - How to Model Analog Blocks with Verilog-AMS Wreal Modeling?

    Analog/Custom Design: Knowledge Booster Training Bytes - How to Model Analog Blocks with Verilog-AMS Wreal Modeling?

    Jaseem TM
    Jaseem TM
    Do you know you can speed up analog or mixed-signal simulations with digital mixed signal technology? View this blog to know more.
    • 13 Dec 2022
  • Using Clarity 3D Solver to Analyze 3D Packaging

    Breakfast Bytes: Using Clarity 3D Solver to Analyze 3D Packaging

    Paul McLellan
    Paul McLellan
    3D packaging is becoming an increasingly popular solution for protecting and packaging sensitive electronic components. However, designing and analyzing 3D packaging can be a complex and time-consuming process. That's where Clarity 3D Solver comes ...
    • 13 Dec 2022
  • Knowledge Booster Training Bytes - In-Design Pegasus Signoff Verify Design (SVD)

    Digital Design: Knowledge Booster Training Bytes - In-Design Pegasus Signoff Verify Design (SVD)

    JentilTom
    JentilTom
    In-Design Pegasus Signoff Verify Design (SVD) integrates Pegasus Signoff and Pegasus SmartVerifyTM with Innovus. These checks help you maintain your designs DRC and LVS clean through the design cycle and help achieve zero DRC and zero shorts out of Innovus, thus saving overall development time.
    • 12 Dec 2022
  • Last Week at Fidelity CFD

    Computational Fluid Dynamics: Last Week at Fidelity CFD

    John Chawner
    John Chawner
    The year 2022 may be coming to an end, but Cadence Fidelity CFD never stops. Here's our weekly review of what we've got going on. From the Blogs Fidelity CFD Mesh Adaptation that Respects Geometry and Reduces Runtime Mesh adaptation can be u...
    • 12 Dec 2022
  • Intelligent System Design Ecosystem Development Is More Important than Ever

    Life at Cadence: Intelligent System Design Ecosystem Development Is More Important than Ever

    Corporate
    Corporate
    Electronic Design Automation (EDA) companies have long concentrated on ecosystem development to ensure successful design practices for their customers. Cadence has many partnerships—with foundries, standards bodies, channel partners, industry ...
    • 12 Dec 2022
  • Training Insights - What Is IR drop? Is it Possible to Run IR-drop Analysis Using Innovus?

    Digital Design: Training Insights - What Is IR drop? Is it Possible to Run IR-drop Analysis Using Innovus?

    P Saisrinivas
    P Saisrinivas

    IR drop is the difference between two endpoints of the conducting wire during a current flow, where the resistance of the conductor will decide the drop percentage. IR drop is also known as the Voltage drop.                            

    So, this Voltage drop in the metal wires weakens the power routing before the actual voltage reaches the power pins of the standard cells, which can affect the speed of the standard cells and the chip…

    • 12 Dec 2022
  • ChatGPT: "A New Technology Adjusts Your Thinking About Computing"

    Breakfast Bytes: ChatGPT: "A New Technology Adjusts Your Thinking About Computing"

    Paul McLellan
    Paul McLellan
    Do you know what ChatGPT is? There's a good chance that the answer is "no" because, last time I looked, mainstream media like the New York Times or the Washington Post have had zero articles about it. But on Twitter, over the last week ...
    • 12 Dec 2022
  • Play by the Rules – Identify and Fix Mesh Quality Issues Right Away!

    Computational Fluid Dynamics: Play by the Rules – Identify and Fix Mesh Quality Issues Right Away!

    Veena Parthan
    Veena Parthan
    The physical models, the solver algorithm, the grid type, the available computer resources, desired outputs, desired level of accuracy, organization's best practices truly determine a grid's acceptability. Using Fidelity Pointwise’s Rules command, one can monitor and verify the specified grid requirements at any time during the meshing process.
    • 12 Dec 2022
  • Virtuoso Meets Maxwell: Are You Telling Me I Can Auto-Generate a Package Schematic From a Package Layout?

    Analog/Custom Design: Virtuoso Meets Maxwell: Are You Telling Me I Can Auto-Generate a Package Schematic From a Package Layout?

    VRF Knight
    VRF Knight
    Yes, you heard that right! You can now auto-generate a package schematic from a package layout with a snap of a finger! With Virtuoso RF Solution, there are all kinds of automations that allow you to have a connectivity-driven design. You can verify the connectivity by the top-level analog simulation and functional verification to make sure your netlist and results are within your expectation. In addition, verify your…
    • 12 Dec 2022
  • Sunday Brunch Video for 11th December 2022

    Breakfast Bytes: Sunday Brunch Video for 11th December 2022

    Paul McLellan
    Paul McLellan
    https://youtu.be/6urbyyIDtZg Made at Koi Palace Contempo (camera Carey) Monday: CadenceLIVE Europe 2022 Tuesday: Axiomise: Formal, Especially for RISC-V Wednesday: Advanced Auto-Routing for TSMC InFO Technologies Thursday: Breakfast Bytes Guide ...
    • 11 Dec 2022
  • Berlin Technik Museum and the Zuse Z1

    Breakfast Bytes: Berlin Technik Museum and the Zuse Z1

    Paul McLellan
    Paul McLellan
    The Berlin Technical Museum, officially the Deutsches Technik Museum, has a big collection of trains, planes, and ships, not to mention textiles, luggage manufacturing, jewellery manufacturing, and more. But I'm going to focus on the computing se...
    • 9 Dec 2022
  • Virtuosity: カスタムIC設計フロー/手法―ポストレイアウト回路シミュレーションとGDSII生成

    カスタムIC/ミックスシグナル: Virtuosity: カスタムIC設計フロー/手法―ポストレイアウト回路シミュレーションとGDSII生成

    Custom IC Japan
    Custom IC Japan
    カスタム/ミックスドシグナル設計における現在の課題は、高速でシリコン精度の高い手法を持つことです。このブログ・シリーズでは、カスタムICの設計フローと手法の段階についてご紹介します。この手法は、設計プロセスを通じてスピードとシリコン精度を最大化することで、これらのIC設計の作成における予測可能性という主要な課題に直接対処します。また、この手法は、アナログ、カスタム・デジタル、RFの主要な設計領域をカバーし、デジタル・スタンダードセル・ブロックとの統合をサポートします。 設計フローの段階 下図は、...
    • 8 Dec 2022
  • Renault Is Lowering Their Carbon Footprint with Cadence

    Life at Cadence: Renault Is Lowering Their Carbon Footprint with Cadence

    Corporate
    Corporate
    The automotive industry is shifting its focus to reducing CO2 emissions from its vehicles, and it’s no surprise, given the current state of the environment. Renault is a world leader in the automotive market, working on internal combustion engi...
    • 8 Dec 2022
  • Breakfast Bytes Guide to Berlin

    Breakfast Bytes: Breakfast Bytes Guide to Berlin

    Paul McLellan
    Paul McLellan
    I was in Munich for CadenceLIVE Europe and took that opportunity to write Breakfast Bytes Guide to Munich. The next day, my wife and I took the train to Berlin. Somehow, I'd never been to Berlin before. There is clearly a lot of history here...
    • 8 Dec 2022
  • PCB設計/ICパッケージ設計: BoardSurfers: Constraint Setの利用によりコンストレイントを効果的に管理する

    SPB Japan
    SPB Japan
    コンストレイント(Constraint)とは、デザイン内のネット、ピン、ビアなどの物理オブジェクトに適用されるユーザー定義のプロパティ、またはルールです。オブジェクトには、そのタイプと動作に基づき適用できるコンストレイントが多数あります。例えば、ネットがデザインで遵守しなければならない最小線幅および最大線幅の値("Line Width")を定義できます。また、すべてのテストピンがテストビアから維持する必要がある最小距離や、Single-line Impedance やProp...
    • 8 Dec 2022
  • Training Insights - Dude, Where's My Software?

    Digital Design: Training Insights - Dude, Where's My Software?

    VNelson
    VNelson
    When you go to download the latest version of Innovus, Genus or Joules our Cadence download site, downloads.cadence.com, you will notice a big change. Instead of the expected INNOVUS221 or GENUS221 or JOULES221 releases, you will find instead DDI221 which includes the 22.1 versions of all three tools.
    • 7 Dec 2022
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