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Breakfast Bytes: Package Assembly Design Kits

Paul McLellan

At the recent IMAPS conference, Cadence's John Park presented on Package Assembly Design Kits: What are they and how they can benefit the packaging community. John started by looking at some history and trends in the market, since heterogene...
- 26 Apr 2021
Breakfast Bytes: Sunday Brunch Video for 25th April 2021

Paul McLellan

https://youtu.be/ZuxS3yM7RCw Made at Communication HIll, San Jose (camera/drone me) Monday: Update: Pointwise, PCIe, RISC-V Tuesday: Brian Jackson Introduces a Mystery Product at IMAPS (Shh, It's OrbitIO) Wednesday: Embracing a Zero Tru...
- 25 Apr 2021
Verification: What Is New in the Latest AMBA 5 ACE, AXI and AHB Protocol Specification Updates?

DimitryP

The industry-standard ARM AMBA® 5 protocol specifications continue to evolve, further improving performance and efficiency of key ARM architecture features. Besides the updates of powerful AMBA CHI (Coherent Hub Interface) specification with Issue D and Issue E features (which will be discussed in-depth in upcoming blogs), ARM invested in updating their highly successful and very popular AMBA AXI, ACE and AHB on-chip…
- 23 Apr 2021
Computational Fluid Dynamics: This Week in CFD

Paul McLellan

This week’s compilation of CFD news begins with a must-read article on how to choose colors properly when visualizing data. AI comes up twice this week as does Fortran which makes one wonder whether anyone’s programming AI in Fortran. The...
- 23 Apr 2021
Digital Design: Pegasus: Get Your Wings: Strong Immunity Makes Pegasus Fault Tolerant

Sarita Sharma

We all know the importance of good immunity and how a good immune system makes you strong. Pegasus is a strong tool which is immune to various types of failures that could occur in a typical compute environment such as network failures, disk issues, ...
- 23 Apr 2021
Breakfast Bytes: Dover and Cadence: Lessons Learned from SolarWinds

Paul McLellan

I recently attended a webinar with presenters from Dover, Cadence, and a mystery guest who was just a silhouette with the name Michael. The title was Lessons Learned from SolarWinds: How to Limit the Scope and Damage of Software Supply Chain Attacks....
- 23 Apr 2021
Breakfast Bytes: Tensilica Vision Q8 and P1 DSPs, More AND Less

Paul McLellan

President George H. W. Bush famously said that he didn't do "the vision thing". Well, here at Cadence we definitely do the vision thing. In fact, the Tensilica Vision DSP product line is the market leader in the vision thing. Until this week, the pri...
- 22 Apr 2021
Digital Design: Low-Power Implementation Training Videos

VNelson

This blog post describes the Low Power Implementation Flow and IEEE 1801 basic terminologies to help understand the low power designs.
- 21 Apr 2021
カスタムIC／ミックスシグナル: Virtuoso Video Diary: 改善されたReference Historyと新機能Merge HistoryによるIncremental Simulation

Custom IC Japan

Virtuoso® ADE Assembler で以下のような状況に陥ったことはありませんか？・Interactiveヒストリに結果がありますが、すべてのスイープ／コーナーをカバーしていないのでは？また、すべてのスイープ／コーナーをカバーするためには、以前の結果を使用することができないため、すべてのシミュレーションを再実行する必要がありますか？・ある設計検証では、さまざまなスイープやコーナーの結果が、それぞれ異なるヒストリに記録されています。しかし、それらを1つの "Gol...
- 21 Apr 2021
Digital Design: Voltus Voice: Demystifying ESD — 5 Types of Checks to Bump up Your ESD Protection

Priya E Joseph

This blog discusses the different Voltus electrostatic discharge (ESD) checks in the form of rules to ensure your design is protected against ESD.
- 21 Apr 2021
Analog/Custom Design: Start Your Engines: Seven Habits of Highly Efficient Mixed Signal Verification Engineers

Lalit Mohan

This blog shares insights on the seven best practices that should be followed by mixed-signal verification engineers.
- 21 Apr 2021
Verification: PSS2.0 is Out – Reflections on the Role of a Standard

matan

We all know that a common language is the basis for every collaborative activity. This is true of natural languages and formal languages alike. In engineering, and specifically in the domain of hardware design/verification, domain languages and forma...
- 21 Apr 2021
System, PCB, & Package Design : (P)SpiceItUp: Search by Category, Description, or Function with PSpice Part Search

Shailly

As a designer, your requirement at the early stages of schematic design is quite different, that is the part information you need when it comes to implementing the schematic design and while simulating it for testing and analysis is different i...
- 21 Apr 2021
Breakfast Bytes: Embracing a Zero Trust Security Model

Paul McLellan

A couple of months ago, the National Security Agency (NSA) published a document titled Embracing a Zero Trust Security Model. I wrote about this topic almost exactly a year ago in my post From Castles and Moats to Zero-Trust Networking. The prob...
- 21 Apr 2021
Breakfast Bytes: Brian Jackson Introduces a Mystery Product at IMAPS (Shh, It's OrbitIO)

Paul McLellan

I have been criticized in the past for calling OrbitIO the "red-headed stepchild" of the Cadence product line. I think I shall have to improve my positioning and simply call it "ahead of its time". OrbitIO is the cockpit for all t...
- 20 Apr 2021
Verification: CCIX Coherency: Verification Challenges and Approaches

DimitryP

Cache coherency is not a new concept. Coherent architectures have existed for many generations of CPU and Interconnect designs. Verifying adherence to coherency rules in SoCs has always been one of the most complex challenges faced by verification engineers. Over the years, it became even more challenging with increasing number of cores in CPU clusters and introduction of the embedded L3 (level 3) cache to the coherent…
- 19 Apr 2021
Verification: PSS 2.0 Is Available and Driving Portable Stimulus to the Mainstream!

Moshik Rubin

Three years ago, PSS (Portable Test and Stimulus) specification 1.0 was released and started to reshape the way design and verification engineers think about SoC level verification and testing. It took a noble idea of creating a single repr...
- 19 Apr 2021
Breakfast Bytes: Update: Pointwise, PCIe, RISC-V

Paul McLellan

This is another of my occasional update posts, covering changes to recent posts that are not big enough to justify an entire post on their own. Today, Pointwise and PCIe. You will almost certainly have to read further to discover who Pointwise is. Yo...
- 19 Apr 2021
RF /マイクロ波設計: μWaveRiders:Cadence AWR ソフトウェアでの強化されたロードプル

RF Design Japan

　Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題はCadence AWR Design Environmentのリリースのハイライト, 機能ビデオ, Cadenceの教育関係ネットワークのニュース,ソフトウェアのヒント, トリック, カスタマイズ, 機能のスポットライトの中で変わります。このシリーズの新しいブログに関する通知を受け取るために、Subscribe Nowをクリックし、Su...
- 18 Apr 2021
Breakfast Bytes: Sunday Brunch Video for 18th April 2021

Paul McLellan

https://youtu.be/afv9_fRCrq8 Made at Target Oakridge (camera Ziyue Zhang) Monday: "Targeting" the Open Compute Project Tuesday: NUMECA, Computational Fluid Dynamics...and the America's Cup Wednesday: Benedict Evans on Tech 2021: Harder ...
- 18 Apr 2021
Analog/Custom Design: Virtuoso Meets Maxwell: Creating Connectivity Between Die and BGA Package for IC Packaging Process

mgoode

Before the creation of die and package layout can begin, logical connectivity between these two fabrics need to be established. Based on the number of input or output and power or ground connections needed, the physical size and pin arrangement of the IC and package can start.
- 16 Apr 2021
RF Engineering: μWaveRiders: Enhancing Load Pull with Cadence AWR Software

TeamAWR

The Cadence AWR Design Environment platform V15 offers enhanced load pull capabilities that include an expanded harmonic balance tuner (HBTUNER3) and an updated load pull script for performing load pull analysis.
- 16 Apr 2021
Analog/Custom Design: Virtuosity: What’s New on the Cadence Learning and Support Portal – Virtuoso Layout Product Page

Dishika Majumdar

Cadence Learning and Support portal has introduced a new one-stop learning resource to guide you about different features of the Virtuoso Layout Suite products. Click here to know more.
- 16 Apr 2021
Spotlight Taiwan: Palladium Z2和Protium X2 雙重奏(Dynamic Duo)引擎系統、邁向驗證新時代 !

candyyu

原文出處: Dynamic Duo 2: The Sequel作者: Paul McLellan有一個故事，可能是虛構的，關於一位編劇在好萊塢找人投資影片的故事。考慮投資的製片說：“這看起來像一部很棒的電影，可惜的是沒有人拍過，所以我們未來可拍續集。”而正好最近幾乎所有其他電影似乎都是漫畫電影或《星球大戰》第47集的續集，所以這故事也許這不是虛構的。過去一年左右，我一直在談論Dynamic Duo。請參考我之前發表的文章 - 動力雙重奏(Dynam...
- 16 Apr 2021
Computational Fluid Dynamics: This Week in CFD

Paul McLellan

This Week in CFD reached convergence long before I had exhausted the two-week backlog of news. With baseball season underway here in the US, fans will enjoy the case study describing how high-fidelity CFD can predict the trajectory of various types o...
- 16 Apr 2021

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