Find Other Members ►

Get email delivery of the Cadence blog (individual posts).

Community

Blogs
Forums
Resources

Latest Forum Posts

Visit the User Forums »

Latest Blog Posts

Life at Cadence: Celebrating Women's History Month with Girl Geek X!

Mary Kasik

To celebrate Women’s History Month in March, Cadence partnered with Girl Geek X for the second time to host another inspiring conference. This virtual, global event featured seven trailblazing leaders at Cadence, who provided motivational advic...
- 31 Mar 2022
Breakfast Bytes: DVCon: There Be Dragons!

Paul McLellan

At the recent DVCon, there was a panel session titled SoC Verification Hidden Dragons. The panel was moderated by Brian Bailey of Semiconductor Engineering. The panel consisted of 3 users and a vendor: Mike Chin of Intel. He is a validation engineer...
- 31 Mar 2022
System, PCB, & Package Design : Cadence OrCAD and Allegro 17.4-2019 HotFix SPB17.40.028 is Now Available

AllegroReleaseTeam

The HotFix 028 (QIR4, indicated as 2022 in the application splash screens) update for OrCAD® and Allegro® is now available at Cadence Downloads. This blog post contains important links for accessing this update and introduces some of the main...
- 31 Mar 2022
Analog/Custom Design: Spectre Tech Tips: Using DSPF Post-Layout Netlists in Spectre Circuit Simulator

Stefan Wuensche

DSPF files are an integral part of post-layout simulations. This blog introduces you to the commands and utilities provided by the Spectre circuit simulator to help you run simulations with DSPF netlists.
- 31 Mar 2022
CFD（数値流体力学): Illinois Blowerは流体シミュレーションによってファンの性能を44％改善

CFD Japan

石油化学およびその他の産業では、空気の換気や500°C以上の有害な塩化物ガスの処理のためにファンを使用しています。これらのファンの最大運転回転速度は業界標準によって管理され、しばしば制限されています。この制限により、ファンメーカーは所望の圧力出力を得るために、インペラの直径を調整することを余儀なくされます。エンジニアは、結果として得られる設計が特大サイズになったり、重くなったり、製造、試験、輸送にコストがかかったりすることを回避しなければなりません。イリノイ州ケーリーに拠点を置くIll...
- 30 Mar 2022
Computational Fluid Dynamics: Shortage of Chips a Challenge for Vehicle Electrification

Veena Parthan

Electric Vehicle (EV) market growth, along with the bourgeoning investments in autonomous driving and infotainment systems that constitute the automotive end market, is a top-line revenue boost for chip manufacturers and suppliers. Alternatives to silicon chips for better performance, faster methods of chip production, and various collaborations or partnerships for efficient EV models are expected to mitigate the perturbation…
- 30 Mar 2022
Computational Fluid Dynamics: Illinois Blower Increases Fan Performance by 44% with Fluid Dynamics Simulation

AnneMarie CFD

Illinois Blower develops and builds custom centrifugal fans and blowers for a variety of worldwide industrial process industries. In order to increase the performance of a centrifugal fan, they performed a 2-phase optimization project using CFD simulation and managed to improve overall performance by 44%. Read here how they did it.
- 30 Mar 2022
Analog/Custom Design: Virtuoso ICADVM20.1 ISR24 and IC6.1.8 ISR24 Now Available

Virtuoso Release Team

The ICADVM20.1 ISR24 and IC6.1.8 ISR24 production releases are now available for download.
- 30 Mar 2022
Breakfast Bytes: ESD Alliance CEO Outlook (and the Kaufman Dinner)

Paul McLellan

The ESD Alliance has two events coming up in the next couple of months, both of which, as it happens, feature Cadence's CEO Anirudh Devgan, although only one with him in the starring role. CEO Outlook Panel The first event is the CEO Outlook Pane...
- 30 Mar 2022
カスタムIC／ミックスシグナル: Virtuoso Meets Maxwell: RF回路でのカスタム受動デバイス – デバイスかそれともインターコネクトか

Custom IC Japan

'Virtuoso Meets Maxwell' はVirtuoso RF ソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です。ではどのようにVirtuosoがMaxwellと出会うのでしょうか。現在、VirtuosoプラットフォームはRF設計をサポートしており、RF設計者は物理的な放射の影響をマクスウェルの方程式で測ります。この連載では、有益なソフトウェアの改善点にスポットを当てて解説するだけでなく、VirtuosoのI...
- 29 Mar 2022
Computational Fluid Dynamics: CFD Wind Studies for Ship Superstructures

AnneMarie CFD

Besides resistance, seakeeping and propulsion, wind loads play an important role in navigation, and wind studies form an essential part of marine engineers' and naval architects' work. Since model tests are expensive and wind tunnel availabilities don't always match project deadlines, CFD simulations become a powerful tool, allowing designers to understand the effects of design changes on their projects quickly and accurately…
- 29 Mar 2022
Breakfast Bytes: The Framework Laptop and Right to Repair

Paul McLellan

You might have heard some discussion about "the right to repair" or R2R. Some of this is centered around mobile phones, and some in a place you would not have first thought of: agriculture. Farmers have long been fighting the good fight against bure...
- 29 Mar 2022
Verification: How to Verify JEDEC DRAM Memory Controller, PHY, or Memory Device?

ssalehab

DDR Memory is an important part of a wide array of electronic system designs in various verticals like Data centers, Cloud computing, Aero-Defense, Mobile, or any other consumer devices. These industries continue to demand higher throughput, energy e...
- 29 Mar 2022
Analog/Custom Design: Virtuosity: Virtuoso-Innovus Interoperability — Making Trim Shapes Interoperable

Savita Thakur

Make your Virtuoso designs Innovus ready by ensuring trim and metal shapes follow the P&R routing style and are readable in Innovus.
- 29 Mar 2022
Life at Cadence: AI Unleashes Chip Designer Productivity

Kam Kittrell

EDA has a history of enabling breakthrough designer productivity. AI in EDA isn’t just making things better. Last year, we launched the biggest, baddest AI in EDA technology called the Cadence®︎ Cerebrus™︎ Intelligent Chip Explorer. It’s a revolutionary product that provides both optimized PPA and productivity benefits.
- 28 Mar 2022
Breakfast Bytes: Cadence: Sustainable by Design

Paul McLellan

Last week, Cadence published the Cadence Sustainability Report 2021 (link at the end of this post). As our CEO, Anirudh Devgan, says in the foreword: Our products enable the world’s leading electronics providers to optimize power, space, and e...
- 28 Mar 2022
Computational Fluid Dynamics: This Week in CFD #468

John Chawner

It's a sunny 81 degrees here in Fort Worth as I type this and after going outside for a few minutes after lunch I can tell you it's plenty warm. But not warm enough to melt a diamond which is the Image of the Week in our roundup of CFD news. What els...
- 25 Mar 2022
Verification: Who Inspires You? - An SVG Women's History Month Spotlight

Melisa

This month, we join millions celebrating and recognizing the achievements of women. We truly value the women who inspire us and have made a difference in our lives. In honor of Women's History Month, we asked our SVG community to share which wom...
- 25 Mar 2022
Breakfast Bytes: March 2022 Update: Intel Video, India, Apple

Paul McLellan

Amazingly, it is already the last Friday in March (and so the last Friday in Q1, it has flown by). So time for one of my update posts where I put stories that are too small to justify an entire blog post, and updates on topics I posted about earlier....
- 25 Mar 2022
Learning and Support: What is IEEE 1500 Wrapper Insertion Flow in Genus Synthesis Solution

MJ Cad

Are you searching for a scalable standard architecture for enabling test reuse and integration for embedded cores and associated circuitry? Are you looking for a standard that addresses testing strategies for the digital aspects of core designs withi...
- 25 Mar 2022
Digital Design: Mitigating Congestion, CTS, OCV and Other Challenges using Cadence Tools and Support

Vinod Khera

With the shrinking gemoetries and data-intensive endeavours of the upcoming industries like IoT, Robotics, Self-Driving Cars, 5G and 6G phones, designs are getting more complex. There are many challenges like congestion, routing, on-chip variations, and unconstrained paths that must be addressed. Cadence 24X7 support and rapid adoption kits (RAKs) helps customers by providing ready support and quick resolution.
- 25 Mar 2022
Breakfast Bytes: DVCon: UVM Birds of a Feather

Paul McLellan

At the recent DVCon 2022, there was a UVM Birds of a Feather meeting. UVM stands for the Universal Verification Methodology. The meeting was free to anyone at DVCon, even with just an exhibit pass. It was led by Mark Strickland who is chair...
- 24 Mar 2022
System, PCB, & Package Design : BoardSurfers: Specifying Layer Information for Multi-Layer Rigid and Flex Stackups

Sanjiv Bhatia

To manufacture a product that performs as you intended, it is imperative that you share accurate stackup definitions with the board fabricator or manufacturer. An accurate stackup definition is critical to getting the best possible performance from ...
- 24 Mar 2022
System, PCB, & Package Design : System Analysis Knowledge Bytes: The Road Ahead for Sigrity - An Interview with Brad Griffin

deeptik

In this blog, Brad Griffin (Product Management Group Director for Sigrity Marketing) talks about our product innovations, specifically Sigrity X, and shares his views about the future of system analysis.
- 24 Mar 2022
Breakfast Bytes: 3D Packaging Versus 3D Integration

Paul McLellan

A couple of weeks ago it was time for the 18th International Conference and Exhibition on Device Packaging (or IMAPS for short, although those are the initials of the organizer, the International Microelectronics Assembly and Packaging Society)....
- 23 Mar 2022

Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.