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Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
• less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog
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Blog - Post List
Latest blogs

Digital Design

Innovus Implementation System 25.1: A Big Leap Forward

The latest Innovus 25.1 major release, packed full of new features and improvements…

• 2 min read
Stylus Common UI , Innovus Implementation System , RTL synthesis

SoC and IP

LPDDR6: A New Standard and Memory Choice for AI Data Center Applications

LPDDR SDRAM, initially developed for low-power mobile devices such as smartphones…

• 2 min read
ddr5 , Design IP , LPDDR , hbm4 , LPDDR Controller IP , lpddr5x , AI training , Lpddr6

RF Engineering

Silicon MMIC Design with Cadence Virtuoso Studio RF Platform

Monolithic microwave integrated circuits (MMICs) combine passive and active components…

• 7 min read
microwave , RF , RF CMOS , mmwave , SiGe , ADS , MMIC , silicon

Corporate News

Understanding Agentic AI and Its Future in Autonomous Design

The semiconductor industry is at a pivotal crossroads, grappling with mounting challenges…

• 7 min read
reasoning models , featured , agentic ai , AI-Driven Design , ai-driven , optimization , AI/ML , autonomous design , interoperability protocols

Analog/Custom Design

How IC25.1 Enhances Functional Safety Analysis for Analog Fault Simulation

In the high-stakes world of automotive electronics, milliseconds matter. Imagine…

• 6 min read
IC25.1 , Analog Design Environment , functional safety , Midas Safety Platform , Cadence blogs , Virtuoso Studio , custom/analog , Virtuoso New Design Platform , cadence , Analog Simulation , MMSIM , midas , IC Release Announcement blog , analog , ADE , training , Virtuoso Analog Design Environment , Cadence training , training bytes , Virtuoso , Spectre , Analog Design Environment , ADE Artist , Virtuosity , autostop , cadenceblogs , Virtuoso Video Diary , fault , Circuit Design , Cadence Education Services , IC Release Blog , analog design , Custom IC Design , fusa , Custom IC , Legato Reliability , custom design technology , ADE Assembler

System, PCB, & Package Design 

EMX Planar 3D Solver – New Key Features and Updates

The increasing complexity of chip designs that leverage 3D-IC technology , heterogeneous…

• 3 min read
fill approximation , 3D-IC , white boxing , black boxing , Virtuoso , crosstalk , Meshing , EM Solvers , EMX Solver

System, PCB, & Package Design 

BoardSurfers: Training Insights: Stay Up-to-Date on the PCB Editor Enhancements

In the ever-evolving world of technology, it is crucial for professionals to stay…

• 3 min read
PCB Layout and routing , Allegro X PCB Editor , BoardSurfers , PCB Editor , PCB design , Training Insights , Constraints , allegro x

System, PCB, & Package Design 

Understanding Signal Integrity in Chiplet Design

Learn how to maintain signal quality in chiplets, overcome SI challenges, and optimize…

• 4 min read
chiplets , Signal Integrity , Sigrity , signal quality

Corporate News

Xcelium Distributed Simulation App Accelerates Multi-Die Simulations Up to 3X

The rise of AI and multi-die systems has pushed traditional simulation methods to…

• 2 min read
news story , featured , chiplets , chiplet , multi-die design , AI , technology

Verification

Training Webinar on Protium X3: Using FullVision for Debugging

Join me, Sandeep Nasa, Senior Principal Education Application Engineer, in our free…

• 1 min read

Computational Fluid Dynamics

Optimizing Ariane Turbopump Design with Fidelity CFD

This blog explores the role of CFD technologies, specifically Fidelity CFD, utilized…

• 4 min read
CFD , ArianeGroup , turbomachinery , Fidelity CFD , Turbopump , space exploration

SoC and IP

Role of Time-of-Flight Sensors in Automotive

In recent posts, we've explored the foundational aspects of Time-of-Flight (ToF)…

• 5 min read
Automotive , IP , Tensilica DSPs , ip cores , Tensilica , vision , Xtensa , semiconductor IP , ADAS , image processing

Learning and Support

News from Cadence ASK Portal

After we introduced the GenAI Feature on Cadence ASK (formerly Cadence Learning and…

• 1 min read
COS , Cadence Online Support , Cadence training , ask , Cadence support

Verification

The Evolution of CXL.CacheMem IDE: Insights into CXL3.0 Security Feature

In continuation of our series on IDE blogs, Why IDE Security Technology for PCIe…

• 3 min read
CXL3.0 , VIP , PCIe , verification

RF Engineering

Introducing Cadence's Virtuoso Studio RF: Advancing RF Design

Next-generation RF to millimeter-wave silicon MMIC and module product development…

• 6 min read
RF Simulation , analog/RF , AWR Design Environment , spectreRF , Virtuoso , Circuit Design , microwave design

Analog/Custom Design

Virtuoso Studio IC25.1 Now Available

Virtuoso Studio IC25.1 production release is now available for download.

• 17 min read
IC25.1 , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement , IC Release Blog , Custom IC Design , Cadence Community

Digital Design

From Chaos to Clarity: Mastering PBS MiM Flow Without the Land Disputes

Let's face it—when most of us hear "partition," we think of land disputes, family…

• 3 min read
Genus , Cadence Online Support , training , Optimize , Cadence ASK , Synthesis

Corporate News

Quantum Machines - Pushing the Boundaries of Quantum Computing

Quantum computing is opening the door to solving problems beyond the reach of classical…

• 2 min read
quantum computing , AWR Design Environment , designed with cadence

Analog/Custom Design

A Deep Dive into AI-Driven Optimization with WiCkeD: The Optimization Powerhouse

Imagine you're training for a marathon. You could try to improve your performance…

• 5 min read
Analog Design Environment , Cadence blogs , Virtuoso Studio , custom/analog , analog , ADE , Virtuoso Analog Design Environment , Cadence training , optimization , Monte Carlo , training bytes , Virtuoso , Spectre , cadenceblogs , Cadence Education Services , yield , Custom IC Design , Custom IC
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