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Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
Cadence Japan 15 Dec 2025 • less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
Corporate 11 Dec 2025 • 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP(Verification IP:VIP)を発表しました。今回発表されたVIPは…

Cadence Japan
Cadence Japan 4 Dec 2025 • less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
Cadence Japan 1 Dec 2025 • 2 min read
featured , japanese blog
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Blog - Post List
Latest blogs

Breakfast Bytes

IEDM, New This Year

It might seem a bit premature to be talking about IEDM since it isn't until December…

Paul McLellan 28 Jul 2016 • 3 min read
International Electron Devices Meeting , 5nm test chip , IEDM

Breakfast Bytes

Gimme a G...Gimme a 3...Whatcha Got?...DSP

Today at the Linley Mobile and Wearables Conference in Santa Clara, Cadence is announcing…

Paul McLellan 27 Jul 2016 • 2 min read
linley mobile and wearables , linley group , Fusion G3 , Linley , Tensilica , linley mobile , Tensilica Fusion G3 DSP , Breakfast Bytes

System, PCB, & Package Design 

Cadence Online Support—Empowering Learning! New Learnings—Sigrity 2016

Cadence Online Support Features Setting up ‘My Alerts” The My Alerts section displays…

Jasmine 26 Jul 2016 • 1 min read
PCB SI , Constraint-driven PCB Design flow , PDN , Signal Intregrity , SigXP UI , PCB Signal and power integrity , Power Integrity , "PCB SI" , Signal Integrity , "PCB design" , PCB Signal integrity , Allegro PCB SI , SI analysis and modeling , power

Whiteboard Wednesdays

Whiteboard Wednesdays - Introduction to the New Tensilica Fusion G3 DSP

In this week's Whiteboard Wednesdays video, Paul Garden provides an introduction…

References4U 26 Jul 2016 • less than a min read
DSP , Whiteboard Wednesdays , IP , floating point DSP , Tensilica , Tensilica IP

Breakfast Bytes

Pathfinding Beyond 5nm

One of the most interesting sessions that I attended at SEMICON West the week before…

Paul McLellan 26 Jul 2016 • 4 min read
tunnel fet , IBM , carbon nanotube , semicon west , imec , coolcube , 5nm , FD-SOI , silicon nanowire

Breakfast Bytes

CDNLive India

CDNLive India is coming up on August 9th and 10th in Bengaluru. I will be there and…

Paul McLellan 25 Jul 2016 • 2 min read
CDNLive India , CDNLive , bengaluru , bangalore

System, PCB, & Package Design 

Cadence Online Support—Empowering Learning! New Learnings from June 2016

Cadence Online Support Features " You might also be interested in ” Section …

Jasmine 22 Jul 2016 • 2 min read
16.6 , PCB Signal and power integrity , "PCB design" , application note , Allegro

System, PCB, & Package Design 

Cadence Online Support – Empowering Learning! New Learnings - February, March 20…

Cadence Online Support Features “ Most Popular ”: This section displays content…

Jasmine 22 Jul 2016 • 3 min read
PCB , Allegro Design Entry , DEHDL , Capture CIS , Cadence Online Support , Allegro Design Workbench , "PCB design" , Allegro PCB Editor , ConceptHDL , application note , ADW , Allegro

System, PCB, & Package Design 

What’s Good About PSpice.com? You’ve Got to See This New Resource Site!

PSpice.com is a new user-community web portal that lets designers, partners, and…

Jerry GenPart 22 Jul 2016 • 1 min read
cadence , AMS simulator , PSPICE , Grzenia

Breakfast Bytes

System-Level Functional Verification and Power Analysis

With DAC and other events during May and June, I am only now wrapping up stuff I…

Paul McLellan 22 Jul 2016 • 2 min read
Functional Verification , Power Analysis , system level functional verification , system level power analysis

System, PCB, & Package Design 

10 Top Reasons to Move Up to Allegro 17.2-2016 Release

The Allegro 17.2-2016 release , the largest in the past 10 years, became available…

hemant 21 Jul 2016 • 8 min read
Constraint-driven PCB Design flow , Allegro 17.2 , Allegro GUI , Routing , Constraint Manager , Rigid-Flex , OrCAD , Sigrity , Allegro PCB Editor , Why Move Up to 17.2 , Allegro

Breakfast Bytes

200mm Fabs Awaken

Modern fabs use 300mm (12") wafers. Older fabs have used 200mm (8") wafers since…

Paul McLellan 21 Jul 2016 • 5 min read
semicon west , semi , fab outlook , 200mm , semi/gartner symposum

SoC and IP

Needs of Energy-Efficient Networking While Using 10 Gigabit Ethernet

Growing deployment level of 10 Gigabit Ethernet in datacenters and automotive infotainment…

Steve Brown 20 Jul 2016 • 1 min read
10G-KR , Ethernet

Verification

Doing Away With the Docking Station

My docking station with the rat’s nest of wires dangling from behind it could be…

Priyab 20 Jul 2016 • 2 min read
USB 3.0 , Verification IP , Docking station , Tensilica Design and Verification IP , VIP , DisplayPort , USB , power delivery , USB3.0 , USB 2.0 , Type-C , USB connector , Alternate Mode , USB 3.1

System, PCB, & Package Design 

What's Good About Allegro PCB Editor Snake Router? The 16.6-2015 Release Has Several…

With the 16.6-2015 Allegro PCB Editor release, the Snake pattern router can be enabled…

Jerry GenPart 20 Jul 2016 • 3 min read
PCB , PCB Layout and routing , Allegro 16.6 , PCB Editor , Layout , PCB design , Grzenia , Allegro PCB Editor , Allegro

Breakfast Bytes

Economic Uncertainty, the Global Economy and Semiconductors

The Monday before SEMICON West starts, there are two events that run in parallel…

Paul McLellan 20 Jul 2016 • 4 min read
semi/gartner symposium , semicon west , gartner , semi , hilltop economics , Breakfast Bytes

Analog/Custom Design

IEEE Recognition of Cadence Software at DAC 2016

Cadence was awarded with the IEEE Donald O. Pederson Best Paper Award—EDA’s most…

NewYorkSteve 19 Jul 2016 • less than a min read
best paper award , DAC , Virtuoso , IEEE

Whiteboard Wednesdays

Whiteboard Wednesdays—Applying Deep Learning to Our Daily Lives

In this week's Whiteboard Wednesdays video, Samer Hijazi discusses bringing deep…

References4U 19 Jul 2016 • less than a min read
Whiteboard Wednesdays , IP , deep learning , Samer Hijazi , Tensilica , embedded

Breakfast Bytes

Linley Mobile Conference...and That ARM Deal

This year's Linley Mobile and Wearables Conference is coming up next week on July…

Paul McLellan 19 Jul 2016 • 4 min read
softbank , Linley , Linley Mobile & Wearables Conference , ARM , Breakfast Bytes
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