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Corporate News

Design for AI and AI for Design

The semiconductor industry is experiencing a once-in-a-generation transformation…

Corporate
• 6 min read
Allegro X AI , featured , infrastructure ai , agentic ai , Integrity 3D-IC Platform

Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
• 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Breakfast Bytes

Spectre/Meltdown & What It Means for Future Design 3

I gave an introduction to speculative execution and the vulnerabilities that have…

• 7 min read
meltdown , architecture , processor , Spectre , speculative execution

Breakfast Bytes

What's For Breakfast? Video Preview September 17th to 21st 2018

https://youtu.be/3drxzhMFGD8 Coming from PCB West (camera Sean) Monday: HOT CHIPS…

• less than a min read
Intel , CDNLive India , cascade lake , NVIDIA , Samsung , hot chips , ARM

Verification

Come Join Us for "Deep Dive into the UVM Register Layer" - A Webinar From Duolos

Join us on September 14th for a free one-hour webinar on the finer aspects of the…

• less than a min read
uvm , Functional Verification , webinar , Duolos , uvm register layer

Analog/Custom Design

Virtuoso: The Next Overture - Congestion Analysis with a New Perspective

Watch out for the exclusive set of routing features, along with the newly introduced…

• 3 min read
Congestion Analysis , Virtuoso Next , Virtuoso Overture , ICADVM18.1 , Virtuoso New Design Platform , Virtuoso Space-based Router , Routing , Virtuoso Advanced Release , Congestion Assistant , New in EDA , Custom IC Design , Virtuoso New Design , Design Planner , Custom IC

Breakfast Bytes

Spectre/Meltdown & What It Means for Future Design 2

I gave an introduction to speculative execution and the vulnerabilities that have…

• 4 min read
meltdown , processor , Spectre , cache , speculative execution , foreshadow

Breakfast Bytes

Spectre/Meltdown & What It Means for Future Design 1

At HOT CHIPS, one of the "keynotes" was actually a panel of what I'll call industry…

• 8 min read
Intel , meltdown , processor , Spectre , cache , ARM , speculative execution , foreshadow

Breakfast Bytes

CDNLive India

CDNLive India took place last week. As usual, I made the long trip from California…

• 5 min read

System, PCB, & Package Design 

New Sigrity 3D Workbench Used in Designing and Optimizing Next Generation High-Speed…

2018 is going to be remembered as the year of 3D for Sigrity. As part of Cadence…

• 2 min read
Sigrity 2018 release , 3D Workbench , Mechanical Structures , CDNLive , High Speed Structure Optimization , PowerSI 3D EM Extraction Option , 3DEM , 3D , Sigrity , High Speed design

PCB、IC封装：设计与仿真分析

升级到Allegro17.2-2016的10大理由之4：行业领先的背钻能力

背钻的发展历程 15年来，在很多电子设计中处理5Gbps或更高频率的高速接口布线已越来越常见。在信号过孔上存在Stub的情况下，高速信号换层将会对信号完整性产生巨大影响…

• less than a min read
PCB , Chinese blog , Allegro 17.2 , 背钻 , PCB设计 , 中文 , Allegro PCB Editor , Allegro PCB编辑器 , Allegro升级17.2 , Allegro

PCB、IC封装：设计与仿真分析

升级到Allegro17.2-2016的10大理由之3：新的PAD编辑器——不只是一个新GUI

客户反馈是产品改善的关键 当您在理解Allegro 17.2-2016发行版的特点和优势时，我可以猜到您在想什么。“哦不，他们对我的工作环境做了什么破坏？”如果您已使用Allegro多年了…

• less than a min read
Chinese blog , Allegro 17.2 , 钻孔 , 掩模 , 禁止区 , PCB设计 , 中文 , 焊盘 , Allegro升级17.2 , Allegro

RF Engineering

Measurement of Phase Noise in Oscillators

The other day, I happened to sneak out some time for myself after having sent the…

• 1 min read
HBnoise , HB , Spectre RF , pnoise , phase noise , harmonic balance , pss , Oscillator

Analog/Custom Design

Virtuoso: The Next Overture – Introducing Design Planner

Watch out for our new layout design capability that allows you to plan more efficiently…

• 2 min read
Virtuoso Next , Virtuoso Overture , ICADVM18.1 , Virtuoso New Design Platform , Virtuoso Advanced Release , Virtuoso , New in EDA , Custom IC Design , Design Planner , Custom IC , Layout Editing

Breakfast Bytes

PCAST: The President's Council of Advisors on Science and Technology

In January 2017, a report Ensuring Long-Term U.S.Leadership in Semiconductors was…

• 6 min read
electronics resurgence initiative , Hennessy , magestic , pcast , eri , darpa

Breakfast Bytes

What's For Breakfast? Video Preview September 10th to 14th 2018

https://youtu.be/iv9wdAVB6vg Coming from CDNLive India (camera Seena Shankar) Monday…

• less than a min read
meltdown , CDNLive India , CDNLive , Spectre , hot chips

Breakfast Bytes

Numbers Everyone Should Know

At the recent HOT CHIPS, Paul Turner of Google Project Zero talked about numbers…

• 5 min read
cpu speed , cache , networking

Breakfast Bytes

GLOBALFOUNDRIES Drops 7nm to Focus on Other Geometries

GF put out a press release last week with the title GF Reshapes Technology Portfolio…

• 4 min read
Intel , AMD , Samsung , TSMC , 5nm , GlobalFoundries , 7nm , EUV

Academic Network

APAC IC Design Contests

China Graduate IC Design Contest Contest Duration: April – August 2018 This is Cadence…

• 1 min read
apac , Cadence Academic Network

Whiteboard Wednesdays

Whiteboard Wednesdays - What You need to Know About ISO26262-2018 2nd Edition

In this week's Whiteboard Wednesdays video, the first in a multi-part series, Scott…

• less than a min read
Whiteboard Wednesdays , ISO 26262

PCB、IC封装：设计与仿真分析

升级到Allegro17.2-2016的10大理由之2：新的实时并行团队设计功能

利用团队设计实现快速设计 无论如何，PCB团队设计总是实现快速设计的最佳捷径。您可以使用Allegro 17.2 2016版本中新的实时并行团队设计功能，通过动态分配资源来应对设计周期不断缩短的挑战…

• less than a min read
PCB , Chinese blog , Allegro 17.2 , Symphony , PCB设计 , 中文 , 实时设计 , Allegro升级17.2
CDNS - Fix Layout Hompage