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Corporate News

Honda + Cadence = Physical AI (part 2): Where Physical AI Will Be Won

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The real challenge of physical…

Corporate
• 8 min read
featured , physical ai , HGR , AI , Honda

Corporate News

The New ASK Portal Brings a Smarter, Faster, and More Intuitive Experience

Finding the right support content should be simple, fast, and intuitive. The new…

Corporate
• 2 min read
featured , customer support , New ASK Portal , ASK Gen AI

Corporate News

The Three-Layer Cake: The Foundation Behind Intelligent Engineering

Artificial intelligence is rapidly becoming the engine behind the next era of technology…

Corporate
• 7 min read
featured , infrastructure ai , agentic ai , Principled Simulation , physical ai

Data Center

Cadence Accelerates Digital Twin–Driven Data Center AI Modernization with HPE

Solution will maximize data center and AI factory profitability while delivering…

Corporate
• 3 min read
news story , featured , infrastructure ai , data center , hpe
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Blog - Post List
Latest blogs

Academic Network

Great Collaboration on Teaching Verification with Bosch Sensortec and HTW Dresde…

The HTW Dresden - University of Applied Sciences offers several courses in the area…

• 3 min read
HTW Dresden , Specman , Cadence Academic Network , Bosch Sensortec , verification

Breakfast Bytes

Analyzing On-Chip RF Passives

RF stands for radio-frequency. Obviously, this covers radios of all types, but as…

• 7 min read
RF , EMX , RF design , radio

Digital Design

iSpatial Flow in Genus: A Modern Approach for Physical Synthesis

With advanced-process nodes, the physical delay of a standard cell, net delay, and…

• less than a min read
Genus , video , Logic Design , physical implementation

System, PCB, & Package Design 

BoardSurfers: Training Insights: Adding and Re-Ordering Mask Layers

One idea that completely revolutionized the concept of PCB making is adding layers…

• 3 min read
17.4 , 17.4-2019 , PCB design , Allegro PCB Editor

System, PCB, & Package Design 

IC Packagers: Renaming Nets in a Layout

As the component count increases in package/interposer designs, many more of you…

• 4 min read
17.4 , IC Packaging , Allegro Package Designer , 17.4-2019

Breakfast Bytes

Zhuo Li, DAC Chair, Plus Cadence@DAC

Yesterday was my DAC Preview post. As it happens, Cadence's Zhuo Li is this year…

• 4 min read
57dac , DAC , Accellera , Design Automation Conference

カスタムIC／ミックスシグナル

Virtuosity: 洗練されたExtractedビュー

Cadence® Quantus Smart Viewは、Virtuoso環境の次世代のExtracted Viewです。Smart Viewは、Extracted…

• 1 min read
Smart View , PAD , ICADVM18.1 , ADE Explorer , Virtuoso , Parastics , Virtuosity , japanese blog , Quantus , IC6.1.8 , ADE Assembler , Virtuoso Layout Suite XL

System, PCB, & Package Design 

Streamline Your PCB Design Flow with In-Design and Post-Route Power Integrity An…

Designing an optimized power supply and a PCB without board-level SI/PI problems…

• 8 min read
PCB , Allegro PCB Design Editor , Power Integrity Analysis , Sigrity Aurora , in-design , PowerTree , DC analysis , IR drop , PowerDC

Breakfast Bytes

DAC Preview 2020

It is the 57th Design Automation Conference later this month from July 20 to 24.…

• 6 min read
57dac , DAC , Design Automation Conference

Breakfast Bytes

Sunday Brunch Video for 12th July 2020

https://youtu.be/kA0y55I9zMA Made on my balcony (camera Carey Guo) Monday: Cadence…

• less than a min read
sunday brunch

カスタムIC／ミックスシグナル

Virtuosity: 新しいアイダイアグラムの測定

Virtuoso® Visualization and Analysis のEye Diagram アシスタントを使用すると、アイダイアグラムを作成したり、マスクを追加したり…

• less than a min read
Eye Mask , Analog Design Environment , ViVa-XL , ADE Explorer , Explorer , ADE XL , ADE , eye diagram , ViVA , Virtuosity , japanese blog , Custom IC Design , ADE Assembler

Analog/Custom Design

Virtuosity: Usability Enhancements in the Chop Command of Virtuoso Layout Suite

The Chop command in Virtuoso Layout Suite has been enhanced to improve your productivity…

• 2 min read
ICADVM18.1 , Layout Suite , Virtuoso , layout editing chop , usability , Custom IC Design , IC6.1.8

System, PCB, & Package Design 

BoardSurfers: 17.4-2019 HotFix 007 for ECAD-MCAD Library Creator Is Now Availabl…

The Library Creator 17.4-2019 HotFix 007 update is now available. This time, the…

• 1 min read
Library Creator , 17.4-2020 , 17.4-QIR1 , 17.4-2019 , ECAD-MCAD Library Creator , PCB design , Allegro PCB Editor , Allegro

Breakfast Bytes

There Is a Statue of Nikola Tesla in Palo Alto...with Free WiFi

Tesla is most famous these days as the name of a car company. But Nikola Tesla was…

• 6 min read
anniversary , Nikola Tesla , tesla

Academic Network

Cadence Academic Network Welcomes AWR and EMX Users to Join Us!

At the beginning of 2020, Cadence made two big announcements, as part of the Intelligent…

• 3 min read
integrand , Cadence Academic Network , awr , EMX , intelligent system design , university program

Breakfast Bytes

Photography with Computers

Yesterday, in my post Photography of Computers , I wrote about photographing computers…

• 5 min read
video , photography , mobile , Smartphone

Digital Design

Want to Explore Third-Party DFT Insertion Process in Genus?

Are you concerned about the process to integrate third-party DFT insertion during…

• less than a min read
scan , DFT , Logic Design , third-party

Breakfast Bytes

Photography of Computers

In the early days of computers, I think computers were generally just called "computers…

• 7 min read
fugaku , summit , home computers , photography

Analog/Custom Design

Virtuosity: In the Line of Veri-Fire - Episode 1

Hi readers! Welcome to Veri-Fire, a blog series that helps you deep dive into Virtuoso…

• 8 min read
verifier , Analog Design Environment , Cadence blogs , ICADVM18.1 , Analog Coverage , verification plan , analog , ADE , analog verification , Mixed-Signal , Virtuoso Analog Design Environment , Virtuoso , Virtuosity , ADE Blog Series , FAQ , implementations , analog design , Custom IC Design , requirements , Custom IC , ADE Verifier , IC6.1.8 , Assembler , custom design technology , ADE Assembler , verification
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