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CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela Samuel
• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
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Blog - Post List

Latest blogs

Corporate News

The Power of Computational Software—From Revolutionizing Chips to Cancer Researc…

This post is an excerpt from the keynote presentation at CadenceLIVE India, given…

• 8 min read
PCB , CFD , artificial intelligence , featured , packaging , biosimulation , data center , Generative AI , cloud , Computational Fluid Dynamics , GenAI , AI Optimization , intelligent system design , analog design , AI-Driven Verification , AI , semiconductors

Analog/Custom Design

Virtuoso Studio IC23.1 ISR1 Now Available

Virtuoso Studio IC23.1 ISR1 production releases are now available for download.

• 1 min read
Cadence blogs , Virtuoso Studio , IC Release Announcement blog , IC Release Blog , Custom IC Design , Cadence Community , IC23.1

カスタムIC／ミックスシグナル

Virtuoso Meets Maxwell: Custom Passive Device Authoring – パート 1 (マーカー図形の自動生成)

'Virtuoso Meets Maxwell'はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です…

• 1 min read
EM simulation , Virtuoso Meets Maxwell , Virtuoso RF Solution , Electromagnetic Solver , Virtuoso Multi-Technology Solution , japanese blog , Custom IC Design , IC23.1

CFD（数値流体力学)

低圧蒸気タービンの機械学習による最適化

一度ご登録いただくと、ケイデンスのすべてのオンデマンド・ウェビナーにアクセスできます。 大規模な言語モデルがAI/機械学習の一面を飾るニュースとなっていますが…

• less than a min read
CFD , featured , turbomachinery , webinars , machine learning , optimization , japanese blog

Cloud

Arm's Cloud EDA Success: Two Paths to Greater Value

Do you struggle with limited on-site computing resources and less-than-par productivity…

• 6 min read
featured , cloud , Jasper , Spectre , aws , xcelium , ARM , Graviton3

System, PCB, & Package Design 

CadenceLIVE's Multiphysics Track Highlights System Simulation Design Solutions

On August 29 and 31, CadenceLIVE China and CadenceLIVE Taiwan will bring together…

• 1 min read
Power Integrity , Artificial Intelligence , Signal Integrity , electromagnetic , Thermal Integrity , cadencelive , multiphysics

Analog/Custom Design

Current Mirrors in Analog Layout

Current mirrors are found in almost every analog IC circuit to provide bias currents…

• 6 min read

PCB、IC封装：设计与仿真分析

如何确定目标阻抗以实现电源完整性？

本文要点 • 将 PDN 阻抗设计为目标值有助于确保设计的电源稳定性。• PDN 目标阻抗在一定程度上会决定 PDN 上测得的任何电压波动。• 确定目标阻抗需要考虑…

• 1 min read
阻抗分析 , PI , Chinese blog , 电源完整性 , PDN , Sigrity X , 电源 , 中文

Analog/Custom Design

Virtuoso Studio: Design, Planning, and Analysis - The 3 Sides of a Coin, Episode…

Check out how the Virtuoso Design, Planning, and Analysis just got better to help…

• 3 min read
Virtuoso Studio , analog design , Design Planner , Custom IC

Spotlight Taiwan

CadenceLIVE Taiwan 2023 - 創新前瞻．智慧應用．產業共榮．歡慶35

引頸期盼! 一年一度各領域精英相互交流，深度探討半導體技術、電子設計和科技趨勢與設計經驗的 CadenceLIVE Taiwan 2023 ，即將於8月31日(四…

• less than a min read
cadencelive taiwan , taiwanese blog , intelligent system design

Computational Fluid Dynamics

On-Demand Webinar - Clipped-Voronoi Diagram Meshing for Scale-Resolving Simulati…

In this webinar, you will be introduced to the clipped-Voronoi Diagram mesh generation…

• 1 min read
CFD , webinars , Computational Fluid Dynamics , fluid dynamics , Fidelity CFD , Mesh Generation , Meshing , LES

Digital Design

Training Insights - Want to Implement Functional Safety to Make the Design Robust…

Reliable semiconductors will be crucial to the success of future safety systems.…

• 1 min read

カスタムIC／ミックスシグナル

Start Your Engines: エラボレータによるミックスシグナル・パーティションのデバッグ

Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により…

• 1 min read
real coercion , real number modeling , AMS , mixed signal design , debug , Elaborator , AMS Designer , detailed discipline resolution , Mixed-Signal , analog/mixed-signal , AMS simulation , japanese blog , wreal , AMS Verification , mixed-signal verification

Digital Design

Learn How Cadence and Arm Are Building the Future of Infrastructure

With over 30 years of experience in the semiconductor industry, Cadence and Arm Are…

• less than a min read
digital design , artificial intelligence , Generative AI , designed with cadence , Cadence Cerebrus , machine learning , Digital Implementation , GenAI , chip design automation , AI/ML , ARM , AI

Analog/Custom Design

Knowledge Booster Training Bytes - Switched Capacitor and C2V Converter-Based Ci…

In this Knowledge Booster blog, let us talk about the simulation of the circuits…

• 4 min read
blended , blended training , Spectre RF , learning , newton , training , digital badges , training bytes , Spectre , Cadence certified , Virtuoso Video Diary , Custom IC Design , online training , Custom IC

PCB、IC封装：设计与仿真分析

哪些原因会导致 BGA 串扰？

本文要点：• BGA 封装尺寸紧凑，引脚密度高。 • 在 BGA 封装中，由于焊球排列和错位而导致的信号串扰被称为 BGA 串扰。 • BGA 串扰取决于入侵者信号和受害者信号在球栅阵列中的位置…

• 1 min read
PCB , Chinese blog , IC封装设计 , Allegro Package Designer Plus , PCB设计 , 中文

Analog/Custom Design

Virtuoso Meets Maxwell: Custom Passive Device Authoring - Part 2 (LVS)

Welcome to the second blog on Custom Passive Device Authoring (CPDA). RF designers…

• 6 min read
EM simulation , Virtuoso Meets Maxwell , Virtuoso RF Solution , Electromagnetic Solver , Virtuoso Multi-Technology Solution , Custom IC Design , IC23.1

Artificial Intelligence (AI)

Are There Pitfalls to Embracing Generative AI in Chip Design?

With every new technology comes a learning curve, some are steeper than others, and…

• 6 min read

Digital Design

Training Webinar: IR-Aware ECO Optimization Using Voltus and Tempus Solutions

This blog post draws your attention towards an upcoming training webinar "IR-Aware…

• 1 min read
Static timing analysis , Silicon Signoff and Verification , Voltus IC Power Integrity Solution , Cadence training , Digital Implementation , Tempus Timing Signoff Solution , IR drop
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