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Featured

Corporate News

CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela Samuel
Reela Samuel 2 Sep 2025 • 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 27 Aug 2025 • 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
Corporate 21 Aug 2025 • 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
Vinod Khera 31 Jul 2025 • 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
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Blog - Post List

Latest blogs

カスタムIC/ミックスシグナル

Start Your Engines: AMS Designerのテストケースをクローンして、どこでも再実行可能

Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により…

Custom IC Japan 31 Oct 2022 • 1 min read
mixed signal design , AMS Designer , AMSD , Start Your Engines , Mixed-Signal , Design Capture , japanese blog , Cadence Community

Computational Fluid Dynamics

Last Week at Fidelity CFD

Happy Monday and welcome to this extra spooky edition [obligatory Halloween reference…

John Chawner 31 Oct 2022 • 2 min read
CFD , Marine Engineering , Pointwise , Computational Fluid Dynamics , fluid dynamics , cadencelive , Mesh Generation

Breakfast Bytes

October Update: AWS, Knuth, CHIPS

The last Friday of the month is my day for an update post, including updates to earlier…

Paul McLellan 31 Oct 2022 • 2 min read
knuth , update , aws , chip war

Computational Fluid Dynamics

8 Less-Explored Powerful Commands on Fidelity Pointwise

The essential steps in mesh generation are the same, no matter what type of mesh…

Veena Parthan 31 Oct 2022 • 5 min read
CFD , Meshing Monday , Commands , fluid dynamics , engineering , simulation software , Cadence CFD , Meshing , Fidelity Pointwise

Analog/Custom Design

Spectre Tech Tips: How to Migrate to Spectre X?

Are you still using Spectre APS and you want to migrate to Spectre X? If yes, this…

Moustafa Moham 31 Oct 2022 • 5 min read
spectre aps , Spectre , analog design , spectre x , Spectre X Simulator , verification

Digital Design

Training Insights – Webinar – Transforming your Timing Signoff Experience with Tempus…

This webinar encourages you to learn and apply the latest innovations in the Cadence…

sakshin 30 Oct 2022 • 3 min read
Static timing analysis , Silicon Signoff and Verification , Digital Implementation , Tempus Timing Signoff Solution

Verification

CXL Enumeration: How Are Devices Discovered in System Fabric?

PCIe designed system fabrics rely on software enumeration by Operating System (OS…

Sangeeta Soni 27 Oct 2022 • 2 min read

Life at Cadence

Making Sustainable Data Center Design Possible with Digital Twins

Cadence has expanded into the realms of systems design and computational fluid dynamics…

Nimish Modi 27 Oct 2022 • 2 min read
CFD , featured , data center , thermal

Life at Cadence

CalSol Is Paving the Way for Solar Vehicles

CalSol is on a mission to design, build, test, and race the world’s fastest and most…

Corporate 27 Oct 2022 • 1 min read

Breakfast Bytes

PACMAN and Using Jasper for Security Verification

At the recent Jasper User Group meeting, there were a couple of presentations on…

Paul McLellan 27 Oct 2022 • 5 min read
Jasper User Group , JUG , formal , Jasper , Formal verification

RF /マイクロ波設計

μWaveRiders:Cadence AWR Design Environment V22.1 ソフトウェアのリリースをハイライト

The Cadence AWR Design Environment V22.1 production release is now available for…

RF Design Japan 26 Oct 2022 • 2 min read
RF , RF Simulation , AWR Analyst , Circuit simulation , AWR Design Environment , awr , EDA , AWR AXIEM , RF design , Circuit Design , AWR V22.1 release , microwave office , japanese blog , Visual System Simulator(VSS)

Breakfast Bytes

TSMC OIP: N3E/N4P, 3DFabric, Analog Migration

Today, it ia TSMC's OIP, the Open Innovation Platform Ecosystem Forum. I will write…

Paul McLellan 26 Oct 2022 • 4 min read
OIP , RF , mmwave , n3e , TSMC , n4p , n16

RF Engineering

μWaveRiders: Cadence AWR Design Environment V22.1 Software Release Highlights

The Cadence AWR Design Environment V22.1 production release is now available for…

TeamAWR 26 Oct 2022 • 5 min read
RF , RF Simulation , AWR Analyst , Circuit simulation , AWR Design Environment , awr , EDA , AWR AXIEM , RF design , Circuit Design , AWR V22.1 release , microwave office , Visual System Simulator (VSS)

Computational Fluid Dynamics

On-Demand Webinar - Reduce Ship Fuel Emissions and Costs Through CFD Optimizatio…

Ship designs, made in CAD software, are becoming more complex every day, and CFD…

AnneMarie CFD 26 Oct 2022 • less than a min read
CFD , naval archicture , Marine Engineering , shipping , greenhouse gases , FINE Marine , marine design , marine , fine/marine , Computational Fluid Dynamics , sustainability

Computational Fluid Dynamics

Women in CFD with Shi Yee Lim

The Women in CFD series highlights the career expedition of women in computational…

Veena Parthan 26 Oct 2022 • 5 min read
CFD , product engineer , fluid dynamics , WomenAtCadence , Fidelity CFD , women in engineering , engineering , simulation software , NUMECA , Women in CFD

Cloud

For Advanced Chip Design, It’s Time To Go Cloud-First

EDA in the cloud is on the cusp of mass adoption. Semiconductor companies big and…

Mahesh Turaga 25 Oct 2022 • 6 min read
SaaS , featured , cloud

Breakfast Bytes

Jasper User Group 2022: Ziyad's SOTU

This year's Jasper User Group meeting took place last week. As usual, the meeting…

Paul McLellan 25 Oct 2022 • 3 min read
Jasper User Group , featured , JUG , formal , jjasper , Formal verification

Verification

DisplayPort (DP) Tunneling over USB4

USB4 is an industry standard that tunnels three different protocol specifications…

tfox 24 Oct 2022 • 2 min read
Verification IP , USB4 VIP , USB4v2 , USB4 DP Tunneling , DP Tunneling , usb4

Computational Fluid Dynamics

Last Week at Fidelity CFD

Good morning and welcome to the last full week of October. Before we plunge into…

John Chawner 24 Oct 2022 • 4 min read
Marine Engineering , automotive engineering , FINE Marine , turbulence , geometry cleanup , overset meshing , RANS , solar vehicles , Pointwise , cadencelive , scale-resolving simulation , Mesh Generation
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