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Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog

Corporate News

Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs

Cadence has unveiled 10 Verification IP (VIP) for key emerging interfaces tuned for…

Corporate
• 1 min read
news story , Verification IP , featured
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Latest blogs

SoC and IP

Don’t miss the multicore Pavilion panel discussion at DAC on Monday, June 14

I’ll be moderating the Pavilion panel titled “The Multiplier Effect: Developing Multi…

• less than a min read

SoC and IP

Denali to demo new PureSpec 2.0 verification-management technology at DAC 2010

This news is a bit far afield for Denali’s Memory Blog, but many of our blog readers…

• 1 min read

SoC and IP

Making SSDs, the TweakTown video: See how A-DATA makes SSDs based on SandForce SF…

TweakTown’s crew visited A-DATA’s manufacturing floor during Computex in Taiwan and…

• 1 min read

SoC and IP

ST Microelectronics’ SPEAr1300 Embedded Processor family employs Denali Databahn…

Last month, this blog described the new SPEAr1300 Embedded Processor family from…

• less than a min read

Verification

Accelerating Metric-Driven Verification With “Hotswap” on Verification Computing…

For a while now, Cadence has been providing leading verification solutions and methodologies…

• 1 min read
emulator , DAC , Acceleration , Palladium , hotswap , Emulation , hot swap , metric , metric-driven verification , MDV

Analog/Custom Design

ARM And Cadence Get To The “Core” Of Mixed-Signal Design

An increasing number of analog and mixed-signal designs in automotive, power management…

• 4 min read
Cortex , analog , Mixed-Signal , Virtuoso , Cortex-M0 , mixed signal , ARM

Verification

Specman, e, and EDA360

The EDA industry is all abuzz over the new vision paper "EDA360 - The Way Forward…

• 5 min read
SystemVerilog , DAC , AMS , uvm , Specman , IP , HW/SW , methodology , CDNLive , metric driven verification (MDV) , Functional Verification , VIP , EDA360 , Mixed Signal Verification , Multi-domain verification: HW/SW co-verification , Incisive , e , OVM-e , ISX (Incisive Software Extensions) , ClubT , Aspect Oriented Programming , SystemC , ISX , MDV , Incisive Enterprise Simulator (IES) , VHDL , ESL , AOP , Matlab , IES-XL , Trailblazer

SoC and IP

MemCon 2010 agenda posted. Your only problem: Which free track do you need to attend…

We’ve just posted the agenda for MemCon 2010. If you touch semiconductor memory in…

• 2 min read

SoC and IP

Apple controls 20% of NAND Flash market with iPhone and iPad says DRAMeXchange

With Apple fervor pheromones still heavy in the air from yesterday’s introduction…

• less than a min read

Verification

India Takes The Lead By Hosting The First Two “ClubTs” in 2010

Specman/ e users in India were very excited to see the first two ClubT events hosted…

• 4 min read
IntelliGen , Specman , Functional Verification , validation , e , team specman , ClubT , AOP , IES-XL

Verification

System Development – What To See At DAC 2010

The EDA360 vision paper specifies key System Realization challenges. Embedded software…

• 6 min read
DAC , cadence , ITRI , system realization , OSCI , Calypto , TSMC , Gary Smith , Imperas , SystemC , ARM , wind river , HLS , DAC 2010

SoC and IP

INDILINX reveals use of its Barefoot SSD controller in HLDS’ HyDrive optical/solid…

This blog has twice written up the newly announced HyDrive optical/solid-state hybrid…

• less than a min read

SoC and IP

Denali’s never-ending list of parties expands to Flash Memory Summit: August 18

Seems like the list of Denali parties for Summer 2010 never ends. Denali is heavily…

• less than a min read

SoC and IP

Verification tips and GLOBALFOUNDRIES low-power process to be discussed in Denali…

Going to DAC? Interested in making your verification processes more effective? Interested…

• less than a min read

SoC and IP

Last call for Denali’s DAC party: Anaheim, June 14

It’s the Denali DAC party for 2010. The big one. With the bells and whistles. With…

• less than a min read

Verification

Bloggers and Journalists and Gadflies, Oh My!

There has been quite a bit of discussion out in the blogosphere about the similarities…

• 3 min read
DAC , Functional Verification , EDA , Blogging , blogs

SoC and IP

An inconvenient truth about using DDR3 SDRAM for embedded designs

DDR (double data rate) memory chips mounted on DIMMs have long been the mainstay…

• 3 min read

Verification

EDA360 And The "Paperback Computer"

Have you ever heard an assertion that's so intriguing and farsighted that it sticks…

• 7 min read
events , DAC , IP , paperback computer , innovation , metric driven verification (MDV) , Functional Verification , Advanced Node , EDA360 , Verification IP modeling , EDAC

SoC and IP

Storage Analyst Jim Handy says “NAND Cache is Back!”

Storage analyst and Grand Poobah Jim Handy has just released a free White Paper titled…

• 2 min read
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