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Featured

Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera
Vinod Khera 28 Sep 2025 • 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 25 Sep 2025 • 2 min read
IC 23.1 , featured , Virtuoso Studio , IC Release , Virtuoso

SoC and IP

The Next-Generation UCIe IP Subsystem for Advanced Package Designs

With the rapidly increasing connectivity demands driven by AI/ML and HPC/data center…

MBhatnagar
MBhatnagar 22 Sep 2025 • 3 min read
ucie , Design IP , featured , TSMC , die-to-die

Corporate News

Cadence at the TSMC OIP: Pioneering the Future of Semiconductor Design

The semiconductor industry stands at a pivotal moment. As we push toward more advanced…

Corporate
Corporate 20 Sep 2025 • 3 min read
OIP , featured , 3D-IC , 3DIC , TSMC
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Blog - Post List

Latest blogs

System, PCB, & Package Design 

EE Thermal 101 – Thermal Basics for Electrical Engineers (Part 1 of 4)

Have you ever had a product exceed temperature specifications and wondered what you…

Sigrity 12 Jul 2018 • 5 min read
EE Thermal , temperature , Thermal Basics , Heat transfer , PowerDC

Breakfast Bytes

SEMICON West: The AI Tectonic Shift

At SEMICON West, there always seems to be a theme. Last year, it was China. See my…

Paul McLellan 12 Jul 2018 • 8 min read
artificial intelligence , semicon , IBM , semicon west

Verification

AMIQ and Cadence demonstrate Accellera PSS v1.0 interoperability

There’s nothing like the heat of a DAC demo to stress new technology and the engineers…

Steve Brown 11 Jul 2018 • 2 min read
Perspec , perspec system verifier , AMIQ , Accellera , pss , portable stimulus

Breakfast Bytes

Imec Technology Forum US

Every year, the Monday before SEMICON West, imec hosts ITF US, the US version of…

Paul McLellan 11 Jul 2018 • 6 min read
Memory , Micron , 3D NAND , imec , DRAM , itf us

Analog/Custom Design

Virtuoso IC6.1.7 ISR21 and ICADV12.3 ISR21 Now Available

The IC6.1.7 ISR21 and ICADV12.3 ISR21 production releases are now available for download…

Virtuoso Release Team 10 Jul 2018 • 2 min read

Whiteboard Wednesdays

Whiteboard Wednesday - Tensilica Hardware Safety Kit ISO 26262

In this week's Whiteboard Wednesday video, Divya Kalimuthu highlights all of the…

References4U 10 Jul 2018 • less than a min read
Whiteboard Wednesdays , functional safety , ISO 26262

Breakfast Bytes

DAC: Straight Talk with Lip-Bu Tan

For the last few DACs, every lunchtime the DAC Pavilion has an interview by Ed Sperling…

Paul McLellan 10 Jul 2018 • 7 min read
Ed Sperling , Automotive , 3nm , Lip-Bu Tan , 55DAC , 5nm , 7nm , Design Automation Conference

Digital Design

A Decade of Building CODECs with High-Level Synthesis

Over the past decade, we have seen a dramatic increase in the size of common video…

SeanDart 9 Jul 2018 • 6 min read
High-Level Synthesis , Stratus , SystemC , HLS

Breakfast Bytes

ESD Alliance Workshop on Digital Marketing

I gave a teaser introduction to the Digital Marketing Workshop that the ESD Alliance…

Paul McLellan 9 Jul 2018 • 4 min read
digital marketing , onespin , esd alliance

Analog/Custom Design

Virtuosity: A Guide to Bindkeys for Interactive and Assisted Routing Commands

I'm sure you are well-versed with the benefits of using bindkeys. So, to have a better…

Parula 6 Jul 2018 • 2 min read
Interactive Routing , Create Wire , custom/analog , Virtuoso Space-based Router , VSR , Routing , Create Stranded Wire , Interactive and Assisted Routing , Wire Editing , Mixed-Signal , Layout , Virtuoso , Virtuosity , mixed signal , createbus , Custom IC Design , Assisted Routing , Virtuoso Layout Suite , Custom IC , Interactive Wire Editing

Breakfast Bytes

Liberate Trio: Characterization Suite in the Cloud

Years ago, library characterization used to be fairly straightforward. The library…

Paul McLellan 6 Jul 2018 • 3 min read
characterization , liberate trio , cloud , cadence cloud , ARM

Breakfast Bytes

Overcoming Bias in Computer Vision

At the recent Embedded Vision Summit, Will Byrne gave a presentation Overcoming Bias…

Paul McLellan 5 Jul 2018 • 6 min read
stereotype , embedded vision , bias

The India Circuit

Thirty Years As One Team

Last week, Cadence was recognized as No 28 in the “Best Companies to Work For” study…

Madhavi Rao 4 Jul 2018 • 3 min read
Great Place To Work Institute , GPTW , Cadence India , Best Companies to Work For

Breakfast Bytes

Want to Go on a Second Date?

Yesterday I told you about the Doomsday algorithm in my post Doomsday in 1900 Was…

Paul McLellan 4 Jul 2018 • 6 min read
offtopic , DATE , microsoft

Breakfast Bytes

Doomsday in 1900 Was a Wednesday

Cadence is off today, so time for an off-topic post. In my post Short Papers last…

Paul McLellan 2 Jul 2018 • 6 min read
offtopic , DATE , john conway

SoC and IP

Cadence Tensilica Fusion F1 DSP Stars in NB IoT Applications

Did you make it to MWC Shanghai? I didn’t, but I read about what was hot – narrowband…

PaulaJones 2 Jul 2018 • 1 min read
DSP , IoT , Fusion , ip cores , Tensilica , nb-iot

Breakfast Bytes

What's For Breakfast? Video Preview July 9th to 13th 2018

https://youtu.be/d04TXTJKx5o Coming from Cadence EBC (camera Lan Ly) Monday: ESD…

Paul McLellan 2 Jul 2018 • less than a min read
semicon , imec , 55DAC , esd alliance , palladium cloud

Breakfast Bytes

/* You Are Not Expected to Understand This */

The title of this post, you are not expected to understand this, is one of the most…

Paul McLellan 2 Jul 2018 • 7 min read
ken thompson , unix , bug , john lyons , dennis ritchie

Breakfast Bytes

A History of PSS

In a remark attributed to Otto von Bismarck (or perhaps misattributed), it is said…

Paul McLellan 29 Jun 2018 • 6 min read
Perspec , pss , portable stimulus standard , verification
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