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The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
• 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
• 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA

Corporate News

Honda + Cadence = Physical AI (part 2): Where Physical AI Will Be Won

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The real challenge of physical…

Corporate
• 8 min read
featured , physical ai , HGR , AI , Honda
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Latest blogs

Analog/Custom Design

Virtuoso Studio IC25.1 ISR5 Now Available

Virtuoso Studio IC25.1 ISR5 production release is now available for download.

• 4 min read
IC25.1 , Cadence blogs , Virtuoso Studio , IC Release Announcement blog , IC Release Blog , Custom IC Design

Corporate News

From the Frontlines of Agentic AI EDA: Accelerated by the Arm Computing Era

A Report from CadenceLIVE Silicon Valley 2026 CadenceLIVE Silicon Valley 2026 opened…

• 3 min read
CadenceLIVE Silicon Valley 2026 , featured , agentic ai , Arm compute , partnership , cadencelive , Ecosystem Collaboration , ARM

Corporate News

CadenceLIVE Wrap-Up: Where AI, Chiplets, and System Design Converged

CadenceLIVE Silicon Valley 2026 has come to a close. What unfolded over the course…

• 3 min read
CadenceAI , featured , demo booths , agentic ai , CadenceLIVE2026 , Event Wrap-up , physical ai , AI for design , fireside chat , cadencelive , ChipStack AI Super Agent , design for AI , semiconductor conference 2026 , volunteering , Customer Presentations

Corporate News

Day 2 in Motion at CadenceLIVE 2026: From AI Acceleration to System Realization

Day 2 at CadenceLIVE Silicon Valley 2026 carried a different kind of momentum. If…

• 6 min read
CadenceAI , agentic ai , AIinEngineering , EDA , AI for design , Semiconductor , SystemDesign , ChipStack AI Super Agent , design for AI , CadenceLIVE SV 2026 , ChipDesign , verification

Analog/Custom Design

Virtuoso Studio: Excellent XL- Layout XL Tools for Faster LVS Closure

Ensure your layout perfectly matches the schematic. Click here to discover how the…

• 4 min read
IC25.1 , arc , INCAS , Virtuoso , CAS , Application Readiness Checker , Virtuoso Layout Suite , LVS Check , Incremental CAS , Connectivity Analyzer , IC23.1

Artificial Intelligence (AI)

Reimagining Chip Design - From Spec to Signoff with Cadence AI Super Agents

At CadenceLIVE Silicon Valley 2026, Cadence took a major step toward fully autonomous…

• 4 min read
news story , SystemStack , artificial intelligence , ChipStack AI SuperAgent , ChipStack , featured , agentic ai , InnoStack , Mental Model , 3DStack , AgentStack , AI , ViraStack

Corporate News

What to Expect on Day 2 of CadenceLIVE Silicon Valley 2026

If you’re searching for where semiconductor design is headed next, day 2 of CadenceLIVE…

• 3 min read
AI Driven Verification , AI for design , design for AI , AI Driven Design , CadenceLIVE SV 2026 , Custom IC Design

Corporate News

Expert Perspectives from Across the Physical AI Ecosystem

One of the most thought-provoking discussions at CadenceLIVE centered on a challenge…

• 5 min read
high-fidelity simulation , featured , physical ai , AI for design , cadencelive , design for AI , robotics , Ecosystem Collaboration , Sim-to-real gap , autonomous systems

Corporate News

Advancing Design Productivity Through AI and Super Agents

A Defining Moment for the Semiconductor Industry Paul’s agentic AI special address…

• 5 min read
featured , agentic ai , Tools Agent , Super Agent , cadencelive

Corporate News

Day 1 Track Summary: CadenceLIVE Silicon Valley 2026

From Vision to Execution — AI-Driven Semiconductor Design at System Scale Day 1 at…

• 6 min read
CadenceAI , chiplets , CadenceLIVE2026 , 3DIC , AIinEngineering , Semiconductor , SystemDesign , DigitalDesign , ChipDesign , DesignAutomation , verification

Corporate News

Beyond the Keynotes: Where Innovation Took a Tangible Form

On Day 1 of CadenceLIVE 2026 , the real depth of innovation unfolded on the exhibition…

• 2 min read
CadenceAI , featured , Millennium M2000 , Customer Booths , TECHLeaders , Palladium Z3 , AI for design , cadencelive , ChipStack AI Super Agent , design for AI , Protium X3 , CadenceLIVE SiliconValley 2026 , networking

Corporate News

Key Takeaways from CadenceLIVE Silicon Valley Keynotes

CadenceLIVE Silicon Valley opened against the backdrop of an industry under rapid…

• 6 min read
CadenceLIVE Silicon Valley 2026 , featured , NVIDIA , AI for design , Anirudh Devgan , design for AI , intelligent system design , keynote

Digital Design

Why Restructuring Matters: Essential Insights for Digital Design Engineers

In the fast-evolving world of digital design, engineers are constantly challenged…

• 4 min read
Genus , Joules , Cadence training , training bytes , Digital Implementation , Innovus , Timing analysis , Power Analysis , RTL design

Data Center

Physics Underpinning Decisions: Simulation‑Trained AI Optimizes Tokens per Watt

The rapid rise of AI factories is pushing data center infrastructure beyond the limits…

• 5 min read
news story , featured , AI Factories , digital twin , Cadence Reality Digital Twin Platform

Corporate News

The Stage Is Set: Design for AI, AI for Design at CadenceLIVE Silicon Valley

Something is shifting in the world of silicon design, and you can feel it even before…

• 4 min read
CadenceAI , featured , CadenceLIVE2026 , cadencelive silicon valley , Intelligent Systems , AI in chip design , Semiconductor Innovation , Electronic Design Automation , AIinEngineering , AI for design , System-Level Design , Semiconductor , design for AI , ChipDesign

Cloud

Accelerating Semiconductor Innovation at Cloud Scale

How Cadence Managed Cloud Services on AWS enable faster, scalable, more secure design…

• 3 min read
featured , Cadence Cloud Managed Services , aws , cadence cloud

Verification

C-PHYv3.0 Verification, 35% Throughput Boost for Camera and Display Designs

With the evolution of advanced camera systems and higher-resolution displays for…

• 4 min read
Verification IP , PHY Layer , CPHYv3.0 , 18 Wire state Mode , Camera and Display Interface Design , MIPI-CPHY

Cadence Japan

電子回路とフォトニック回路シミュレーションの統合

フォトニクスの重要性人工知能（AI）の急速な普及や高速モバイルネットワークの展開を背景に、データストレージ需要は大きく拡大しており、大量のデータを処理・転送する能力がこれまで以上に求められています…

• less than a min read
news story , featured , Spectre Photonics , Spectre , japanese blog

Data Center

Industry’s First UALink-200G Controller and PHY Running in 3nm!

AI systems are running into a familiar problem. Compute keeps scaling, but the infrastructure…

• 3 min read
AI data center , data center , hyperscale data center , AI factory
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