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Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog

Corporate News

Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs

Cadence has unveiled 10 Verification IP (VIP) for key emerging interfaces tuned for…

Corporate
• 1 min read
news story , Verification IP , featured
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Blog - Post List
Latest blogs

RF /マイクロ波設計

野外でのIoT向けマルチバンドアンテナ—新しいホワイトペーパー(英語)

大規模なマシンタイプの通信（mMTC）と、拡張されたモバイルブロードバンド（eMBB）および超高信頼性の低遅延通信（URLLC）は、3GPPによって定義された5Gイニシアチブの3つの柱を表しています…

• less than a min read
embb , 5G , RF , urlic , awr , mmtc , mobile , japanese blog

RF Engineering

Multi-Band Antennas for IoT on the Go — New White Paper

Massive machine type communications (mMTC) along with enhanced Mobile Broadband …

• 1 min read
embb , 5G , RF , mmtc , mobile , urllc

System, PCB, & Package Design 

Boardsurfers: An Introduction to Allegro DesignTrue DFM Rule Aggregator

Design companies often work with multiple PCB fabricators and each fabricator may…

• 4 min read
17.4 , Allegro DFM Rule Aggregator , Allegro DesignTrue , 17.4-2019 , DFM , Allegro

Breakfast Bytes

Bootstraps

How does an operating system get started? Obviously, if the operating system was…

• 9 min read
titan , vax , interdata , google , bootstrap

Digital Design

Library Characterization Tidbits: Importance of Noise Analysis and the Role that…

The hustle bustle of the cities is only an example of the external noise, which we…

• 5 min read
CCSN characterization , CCSN , Liberty Variation Format , Reference-based modeling , cross coupled capacitance , characterization , composite current source noise , noise in digital circuit , CCS Noise , Library Characterization Tidbit , channel connected blocks , coupling cap , Liberate , noise propagation , Liberate Characterization Portfolio , Stage-based modeling , CCB , timing

RF /マイクロ波設計

Discover System Analysis Monthly Newsletter(翻訳版)

日本語翻訳版をお届けします。ぜひ最新の製品に関する最新の情報をご確認ください。 システム解析のニュースレターのご購読は こちら からお申し込みください。 創造するために革新する…

• less than a min read
RF , system analysis , awr , japanese blog

Breakfast Bytes

Lip-Bu Tan Honored with SVBJ C-Suite Award

For the last few years, the Silicon Valley Business Journal has honored occupants…

• 3 min read
silicon valley business journal , Lip-Bu Tan , c-suite awards

Breakfast Bytes

Computational Software for Cyber-Physical System Design

The recent 34th International Conference on VLSI Design, also known as VLSID, was…

• 5 min read
computational software , vlsid , vlsid 2021 , cyber physical systems , India

Breakfast Bytes

Cruising Through San Francisco with No Driver

You probably have heard that Waymo has completely driverless (no safety driver) taxis…

• 6 min read
Automotive , autonomy , cruise

Breakfast Bytes

Update: Hogan, Mars, Australia, Solarwinds

I don't normally do these updates this frequently, and never before have I produced…

• 5 min read
australia , solarwinds , Facebook , perseverance , Mars

RF /マイクロ波設計

お客様発表 『 Fast MMIC Design with Distributed EM Analysis』のご案内

概要 回路および電磁界（EM）解析を単一のコンピュータ上の複数のプロセッサ間または外部のリモートコンピューティングファーム全体に分散する機能により、リソースを大量に消費するMMIC…

• less than a min read
AWR Analyst , AWR Design Environment , awr , AWR AXIEM , japanese blog

PCB設計／ICパッケージ設計

BoardSurfers: 17.4-2019に追加されたダイナミックシェイプの 'Fast' モードは本当に早い！

私は Allegro® PCB design のソフトウェアのテストを20年間担当していますが、あごがはずれるほどびっくりする機能をテストすることが時々あります…

• less than a min read
PCB , 17.4 , PCB Editor , 17.4-2019 , japanese blog , Allegro PCB Editor

Verification

Webinar: Extend the Language Using Specman e Macros!

Using Cadence ® Specman ® Elite macros lets you extend the e language ─ i.e. invent…

• 1 min read
Specman , e , training , webinar , macros

Breakfast Bytes

Sunday Brunch Video for 28th February 2021

https://youtu.be/6wgF8p76x5g Made my personal cloud datacenter Monday: Arm/Cadence…

• less than a min read
sunday brunch

Analog/Custom Design

Spectre Tech Tips: Introducing Spectre XDP-HB (Distributed HB)

Spectre XDP-HB was released in the SPECTRE 20.1 base release as part of the new Spectre…

• 2 min read
Spectre RF , Spectre XDP-HB , Spectre X-RF , Spectre X distributed simulation

System, PCB, & Package Design 

(P)SpiceItUp: Simulation Profiles in Five Steps

After completing a circuit, it’s time to run simulations. The first step is to define…

• 4 min read
17.4 , OrCAD Capture , PSpiceA/D , Capture CIS , 17.4-2019 , OrCAD

Analog/Custom Design

Virtuosity: Design, Plan, and Analysis - The 3 Sides Of A Coin, Episode 2

Design, Plan, and Analysis - read why it is important to keep these 3 sides of a…

• 4 min read
Congestion Analysis , Cadence blogs , Virtuoso Layout EXL , Floorplanning , Virtuosity , ICADVM20.1 , dpa , Pin Optimization , pin planning , Custom IC Design , Virtuoso Layout Suite , Design Planning and Analysis

Breakfast Bytes

Liberate Trio on AWS/Graviton2 Instances

This is a sort of continuation of yesterday's post JAWS: JasperGold in the AWS Cloud…

• 3 min read
liberate trio , aws , ARM

カスタムIC／ミックスシグナル

Virtuoso Video Diary: Performance Diagnostic ツール – VirtuosoのMRIスキャナ

この間、私の母は膝の耐え難い痛みに苦しみ、私たちは医者を訪ねることを余儀なくされました。その痛みは外傷によるものではないため、原因を特定できませんでした。それでも…

• less than a min read
performance diagnosis , Virtuoso , performance diagnostic , ICADVM20.1 , japanese blog , Custom IC Design , Custom IC , Virtuoso scanner
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