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Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
• less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Breakfast Bytes

ETS2020: Functional Safety

One of the keynotes for the European Test Symposium 2020 (ETS2020) was by Cadence…

• 6 min read
Automotive , functional safety , ets2020 , Test , european test conference , fusa

Breakfast Bytes

Sunday Brunch Video for 7th June 2020

www.youtube.com/watch Made on my balcony (camera Carey Guo) Monday: The Five Waves…

• less than a min read
sunday brunch

RF Engineering

Solving RFIC and RF Module Design Issues

When creating new RFIC modules, designers typically need an array of tools and applications…

• less than a min read
RF , Virtuoso RF Designer , ICADVM18.1 , RFIC , Virtuoso Meets Maxwell , Virtuoso RF , RF design , Custom IC Design , Custom IC

カスタムIC／ミックスシグナル

Virtuosity: 先端ノード用デバイスレベル配線 ‐ Generate Trunksの使用

このVirtuoso®デバイスレベル配線のブログシリーズの2回目以降では、トランク（幹線）とツイッグ（枝配線）がどのようにツリー構造を構築するかについて説明します…

• less than a min read
Trunk generation , Interactive Routing , Pin to Trunk , ICADVM18.1 , Virtuoso Space-based Router , Layout EXL , Layout Suite , trunk creation , Virtuoso , Generate Trunk , Virtuosity , japanese blog , EM Trunk Optimization , Custom IC Design , Virtuoso Layout Suite

Breakfast Bytes

Modeling with Water

A couple of years ago I wrote a post using the famous quote by statistician George…

• 6 min read
Models , bay model

Analog/Custom Design

Start Your Engines: Exporting AMS UNL IP for Reuse in the Digital Functional Verification…

What if there existed a seamless way to pass verified design blocks freely between…

• 2 min read
AMS , mixed signal design , AMS Designer , mixed signal solution , Verilog-AMS , analog , analog/mixed-signal , Virtuoso , RNM , wreal , AMS Verification , mixed-signal verification , verification

Breakfast Bytes

Four More Waves: 5G, Cars, Clouds, IoT

Earlier in the week, I did a sort of bait and switch, introducing the five waves…

• 5 min read
5G , Automotive , featured , IoT , industrial , cloud , cadence cloud

PCB設計／ICパッケージ設計

2019年10月リリース、OrCAD/Allegro 17.4-2019の新機能ハイライト

洗練された先進的なバージョンであるOrCAD/Allegro 17.4-2019がリリースされました。使いやすさの追求と共に、生産性向上のための新機能が数多く実装されています…

• less than a min read
PCB , 17.4 , OrCAD Capture , APD , PSPICE , PCB Editor , japanese blog

カスタムIC／ミックスシグナル

Virtuosity: 先端ノード用デバイスレベル配線 ‐ Finish Trunkの使用

Virtuoso® Layout Suiteにはデバイスレベルの配線分野に関してユーザーからのご希望に応じて開発された新しい優れた機能が多数存在します。特に最近リリースされた複雑化する先端ノード設計向けの新機能…

• less than a min read
space-based router , layout XL , Layout Suite , Virtuoso , Layout L , Virtuosity , japanese blog , Custom IC Design

System, PCB, & Package Design 

BoardSurfers: DRC Browser – A One-Stop Solution for DRC Management

Design rule checks are essential to ensure the functionality, reliability, and manufacturing…

• 5 min read
DRC , Allegro PCB Editor

定制IC芯片设计

Virtuosity: Auto Device Array - A One-Stop-Shop for Modgens

在本博客中，我将讨论以下这样的功能，一个个人喜爱的功能- the Auto Device Array 一个简单，直观且功能强大的界面，用于创建和自定义Modgens…

• less than a min read
automatic routing , Chinese blog , Modgen On Canvas , Automated Device Placement , ICADVM18.1 , Virtuoso Advanced Release , Automated Device-Level Placement , MODGEN , Automated Device-Level Placement and Routing , automation , Automatic Placement , module generation , Auto Device P&R , Layout EXL , APR , Auto P&R , modgen stacks , Virtuoso , Virtuosity , Virtuoso Placement , Custom IC Design , modgens , Virtuoso Layout Suite , Custom IC

System, PCB, & Package Design 

IC Packagers: Count Your Fingers (Without Using Your Toes)

Let’s talk about wire bonding today! More specifically, the unique labels assigned…

• 4 min read
Allegro Package Designer

Breakfast Bytes

Artificial Intelligence...and Artificial Performance

Do you know what this is? It's a benchmark. The Ordnance Survey (OS) of Britain created…

• 9 min read
deep learning , tops , gflops , neural net , Tensilica , dna150 , tops/mm2 , dna100 , tops/w , neural network

Academic Network

Digital Design and Signoff Training Deep Dive: Part 1 – Synthesis and Test

This blog series will the break down the top 15 Online Training courses among students…

• 5 min read
Europractice , Digital Design and Signoff , Cadence Academic Network , CMC Microsystems , online training , university program

Analog/Custom Design

Virtuoso Meets Maxwell: Thinking Outside the Chip: Overcoming RFIC and RF Module…

' Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and…

• 2 min read
ICADVM18.1 , Virtuoso Meets Maxwell , Virtuoso RF Solution , Virtuoso RF , Virtuoso Analog Design Environment , RF design , Custom IC Design , Custom IC

Breakfast Bytes

TSMC: N7, N6, N5

TSMC has such a large market-share of the foundry business that their roadmap is…

• 8 min read
n5 , 3nm , TSMC , TSMC Technology Symposium , TSMC OIP , n7 , n6 , 6nm , 5nm , 7nm , EUV

定制IC芯片设计

Virtuoso Meets Maxwell: TILP! 什么是TILP?

过去的38年，我一直致力于IC版图设计！在业内不断推出Cadence的新产品，让我积累了宝贵的经验。在这篇博客中，我要谈谈另一创新产品--Virtuoso RF解决方案及其基本概念…

• less than a min read
Chinese blog , ICADVM18.1 , VRF , PCells , Virtuoso Meets Maxwell , Virtuoso RF , Layout EXL , virtuoso system design platform , Technology independent , TILP , Multi-Technology Simulation , Custom IC , VMM

Breakfast Bytes

The Five Waves: AI, 5G, Cars, Clouds, IoT

In Cadence's recent earnings call, Lip-Bu Tan, our CEO, talked about the five waves…

• 5 min read
5G , Automotive , hyperscale datacenter , featured , industrial , cloud , cloud datacenter

Verification

Improving Tests Efficiency Using Coverage Callback

When you go to the store, you walk until you get there, stop, get your groceries…

• 7 min read
Specman , coverage , Functional Verification , Specman e , Coverage-Driven Verification , e , verification
CDNS - Fix Layout Hompage