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SoC and IP

The Power of Shifting Left: Cadence Accelerating Innovation with Arm

In semiconductor design, projects are remembered for their extremes—legendary successes…

Arif Khan
• 3 min read
ucie , xcellium , IP , featured , PHY

Corporate News

Accelerating System Design with Real-Time Simulation, Powered by AI Physics

Rising demand for AI infrastructure is driving faster innovation and smarter use…

Corporate
• 4 min read
CFD , featured , NVIDIA , accelerated compute , millennium

Analog/Custom Design

Virtuoso Studio IC25.1 ISR2 Now Available

Virtuoso Studio IC25.1 ISR2 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Data Center

Innovation in Data Center Design and Operations: Highlights from Thésée Event

The Thésée event brought together key partners like France Télévisions, Thésée, Cadence…

Veena Parthan
• 5 min read
featured , Thésée Event , data center , Cadence Reality Digital Twin Platform
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Breakfast Bytes

Details of TSMC's IEDM Presentation on N5

At IEDM in December, one of the papers in the very last session (a sneaky trick to…

• 5 min read
n5 , TSMC , 5nm , IEDM

Breakfast Bytes

Sunday Brunch Video for 12th January 2020

https://youtu.be/y62D4tVK-_k Made at CES 2020 (camera Gerard Andrews) Last Thursday…

• less than a min read
sunday brunch

Breakfast Bytes

The Rosetta Stone and the British Museum

In the first week of January, I wrote about Lars Liebmann's Rosetta Stone of Lithography…

• 4 min read
british museum , sir john soane's museum , rosetta stone , museums

Breakfast Bytes

What's New in Consumer Electronics? CES 2020

I come to Las Vegas in the first week of January each year to attend what used to…

• 5 min read
5G , Automotive , CES , ces2020 , robotics , drones , AI

Breakfast Bytes

The 40th Anniversary of LAMBDA Magazine

Forty years ago today, January 8, 1980, the first issue of LAMBDA magazine was published…

• 8 min read
vlsi technology , lambda magazine , mead and conway

System, PCB, & Package Design 

IC Packagers: Four Reasons to Avoid Multi-Layer Flip-Chip Pin Padstacks

Designing a package substrate, there are things that many of us do that perhaps we…

• 5 min read
Allegro Package Designer

System, PCB, & Package Design 

BoardSurfers: PCB Electronics—Six Tasks to Prepare Board for Manufacturing

You have placed components and routed the board. You are finally ready to send the…

• 5 min read
PCB Editor

Breakfast Bytes

Open Source in 2020

I recently wrote a couple of posts about open-source EDA tools, OpenROAD: Open-Source…

• 9 min read
open source eda , open source

Breakfast Bytes

Protium and Palladium 1st=

We just finished 2019, of course, so it is time for annual "Best of 2019" lists.…

• 5 min read
Protium , Palladium , embedded software , Emulation

Breakfast Bytes

The History of Lithography, Part 2: From Double-Patterning to EUV

This is a continuation of yesterday's post The History of Lithography, Part 1: From…

• 8 min read
asml , lithography , Double Patterning , multi-patterning , EUV

Breakfast Bytes

The History of Lithography, Part 1: From Stones to Lasers

Lithography was originally a way of printing using a flat stone. Lithos (or λίθος…

• 7 min read
lithography , 193i , RET

The India Circuit

2019: The Year That Was...And Some Surprising News

The biggest happening in 2019 for India was, of course, the general elections. (Though…

• 3 min read
5G , artificial intelligence , deep learning , 2019 , Deep Tech , AI

System, PCB, & Package Design 

The Year That Was: PCB Design Blogs in 2019

The first series BoardSurfers is about PCB designing. It provides information on…

• 2 min read
Library and design data management , PCB Editor , 17.4-2019 , PCB design

System, PCB, & Package Design 

IC Packagers: Stepping into 2020

We started 2019 with the promise to cover all the topics that might interest you…

• 2 min read
Allegro Package Designer

System, PCB, & Package Design 

IC Packagers: Routing Clean-Up Prior to Manufacturing

A fantastic year is ending, so I want to take a quick opportunity to go over some…

• 5 min read
Allegro Package Designer

System, PCB, & Package Design 

IC Packagers: Guiding Your Team with Workflows

The flow for efficiently and correctly designing a package substrate layout is a…

• 5 min read
APD

Breakfast Bytes

Sunday Brunch Video for 22nd December 2019

https://youtu.be/iEuzyt_6O_A Made in my living room (camera Carey Guo) Monday: The…

• less than a min read
sunday brunch

PCB、IC封装：设计与仿真分析

如何利用Allegro SiP Layout工具5步实现复杂引线框架封装的完整设计？

文章翻译自Cadence博客“ Designing a Complex Leadframe Package? See How SiP Layout Tool Can…

• less than a min read
Chinese blog , SiP , SiP设计 , 引线框架 , 中文 , 封装设计 , IC封装 , SiP Layout

Academic Network

Cadence Co-organized the First EDA Competition to Help China Train More EDA Tale…

The first “China IC and EDA Design Elite Competition” started in June 2019 and received…

• 2 min read
university , Cadence Academic Network , academia , EDA
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