Cadence Community

Blog - Post List

Latest blogs

Life at Cadence

My Life at Cadence Video Series: Sneharsi Nag

Cadence recently interviewed five of our amazing women engineers for a new video…

Mary Kasik 15 May 2020 • less than a min read

Insights on Culture , inclusion , Culture , STEM , cadence , my life at cadence , women , engineering

Digital Design

SSV 20.1 Base Release Now Available

The SSV 20.1 production release is now available for download.

SSV Release Team 15 May 2020 • 3 min read

Vector Profiler , Signoff ECO , Tempus , Tempus PI , integrated signoff , Power Integrity , Voltus , Voltus-XP

System, PCB, & Package Design

BoardSurfers: Three Steps to Using Embedded Components

If you think embedding components in a PCB just reduces product size, well that's…

mrigashira 15 May 2020 • 4 min read

embedded components , Allegro Package Designer , Allegro PCB Editor

Breakfast Bytes

Tensilica HiFi DSPs with Dolby Atmos for Soundbars

Do you know what a soundbar is? Years ago, if you wanted to build a good home theater…

Paul McLellan 15 May 2020 • 4 min read

HiFi , Tensilica

Digital Design

Library Characterization Tidbits: Reuse to Recharacterize - Improve Productivity…

A write up on how Liberate MX effectively enables you to characterize only the failed…

KamleshSinghDodiya 15 May 2020 • 3 min read

memory characterization , incremental run , timing validation , Liberate MX , Digital Implementation , interpolation error , library validation , Rapid Adoption Kits , RAKs

Verification

Catching up with Higher Ethernet Speed: VIP Supports 802.3ck

Draft 1.0 of 802.3ck, also known as 100G per lane, was finally published by IEEE…

Dave Huang 14 May 2020 • 2 min read

802.3ck , Ethernet VIP , baseR , VIP , 100Gbps , 100G backplane , CGPL

Verification

Sizing Up eUSB2 Verification

USB is one of the most widely used interfaces in the PC market for more than 20 years…

Dave Huang 14 May 2020 • 2 min read

VIP , USB-IF , eUSB , USB 2.0 , eUSB2

Verification

Why Is the Evolving HBM3 Such a Revolutionary Technology and How Can You Be Ready…

Since 2013, we have seen the HBM specifications being released by JEDEC and companies…

Thierry Berdah 14 May 2020 • 3 min read

Verification IP , Memory , VIP , JEDEC , HBM , storage , Design IP and Verification IP , verification

Breakfast Bytes

3G and 4G: The Internet Arrives

In posts over the last couple of weeks, I covered 1G and 2G mobile: 1G Mobile:…

Paul McLellan 14 May 2020 • 7 min read

3g , 5G , mobile

Breakfast Bytes

John Park's Webinar on Chiplets

Recently Cadence's John Park presented a webinar on Design Methodologies for Next…

Paul McLellan 13 May 2020 • 6 min read

SiP , featured , advanced packaging , 3DIC , OrbitIO , intelligent system design

Analog/Custom Design

Virtuoso IC6.1.8 ISR11 and ICADVM18.1 ISR11 Now Available

The IC6.1.8 ISR11 and ICADVM18.1 ISR11 production releases are now available for…

Virtuoso Release Team 13 May 2020 • 3 min read

Cadence blogs , ICADVM18.1 , ADE Explorer , Virtuoso RF Solution , IC Release Announcement blog , Virtuoso Visualization and Analysis XL , Virtuoso Analog Design Environment , Virtuoso , IC Release Blog , Virtuoso Layout Suite EXL , Virtuoso Layout Suite , IC6.1.8 , ADE Assembler , Virtuoso Layout Suite XL

System, PCB, & Package Design

New PCIe SI Challenges Conquered Using Clarity 3D Field Solver for PCB

Figure 1: High-performance PCIe-based graphics card There is a trend in the data…

Sigrity 12 May 2020 • 10 min read

Serial link analysis , SI , bit-error-rate , PCIe , Signal Integrity , serial link , SerDes , Channel simulation , Sigrity , Clarity 3D Solver , PCI-SIG , clarity

System, PCB, & Package Design

IC Packagers: The Choice Between Static and Dynamic Shapes

That title might be a touch misleading. We’re not here to talk about why to convert…

Tyler 12 May 2020 • 5 min read

Allegro Package Designer , Allegro PCB Editor

Breakfast Bytes

Happy Birthday Florence Nightingale: Nurse, Statistician, Feminist

Today is the 200th anniversary of the birth of the first woman member of the Royal…

Paul McLellan 12 May 2020 • 7 min read

florence nightingale , statistics , women in science

System, PCB, & Package Design

Challenges of On-Chip Thermal Analysis in Electronic System Designs

In the beginning of our universe, enormous amount of heat or energy was generated…

CTKao 11 May 2020 • 4 min read

Celsius Thermal Solver , IC Package , system analysis , EE Thermal , temperature , Power Integrity , 3D analysis , Voltus , Heat transfer , electrical-thermal co-simulation , thermal , heterogenous integration

Analog/Custom Design

Virtuoso Meets Maxwell: Help with Electromagnetic Analysis - Part VI

This is the last blog in the miniseries that aims at providing in-depth details of…

Kabir 11 May 2020 • 4 min read

EM Analysis , AXIEM , ICADVM18.1 , awr , Virtuoso RF , Electromagnetic analysis , 3D EM simulation , AWR AXIEM , Custom IC Design , Virtuoso Layout Suite