Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
• 4 min read
Edge AI , featured , Ambarella

Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera
• 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

Virtuoso Release Team
• 2 min read
IC 23.1 , featured , Virtuoso Studio , IC Release , Virtuoso
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Analog/Custom Design

Virtuosity: An Introduction to Modgen

This blog provides an overview of Virtuoso Module Generator, also referred to as…

• 3 min read
EAD , Modgen On Canvas , MODGEN , automation , Automatic Placement , module generation , Module Generator , Layout , Custom IC Design , modgens , Virtuoso Layout Suite , Virtuoso Layout Suite XL

Breakfast Bytes

HOT CHIPS: The Biggest Chip in the World

At HOT CHIPS earlier this week, Cerebras announced the biggest chip in the world…

• 6 min read
artificial intelligence , deep learning , cerebras , wafer scale integration , TSMC , hot chips , AI

Verification

Automotive Security in the World of Tomorrow - Part 1 of 2

Autonomous vehicles are coming. In a statistic from the U.S. Department of Transportation…

• 3 min read
security , Automotive , Functional Verification , Green Hills Software

Analog/Custom Design

SPECTRE 19.1 Release Now Available

The SPECTRE 19.1 production release is now available for download.

• 1 min read
Dynamic Checks , Spectre Fault Analysis , SPECTRE 19.1 , Spectre X Simulator

Breakfast Bytes

TSMC Museum of Innovation

When I was in Taiwan for CDNLive Taiwan, I visited the TSMC Museum of Innovation…

• 4 min read
TSMC , museum , tsmc museum of innovation

System, PCB, & Package Design 

BoardSurfers: PCB Electronics - Six Things to Do Before You Actually Place Components…

It's a PCB you are designing. Where do you start? What can you do to make your process…

• 6 min read
PCB Editor

System, PCB, & Package Design 

IC Packagers: Choosing the Right Netlist to Match Your Needs

Netlists. Everyone needs them! But what you are using your netlist for can have a…

• 4 min read
APD , IC Packaging & SiP design , SiP Layout

Breakfast Bytes

CDNLive India 2019 Preview

CDNLive India is coming up next week. It will be August 28 and 29 at the Radisson…

• 4 min read
CDNLive India , CDNLive , bengaluru

Breakfast Bytes

HOT CHIPS 2019

This week is HOT CHIPS. It has moved from the Flint Center at De Anza College, where…

• 5 min read
hot chips

定制IC芯片设计

Virtuosity: ADE What’s New 中文版上线!

您知道当您有感情需要抒发时，脱口而出便是母语。想知道为什么吗？这是我们与生俱来的本能。我们一般使用英语作为商业通用语言，但是我敢打赌，如果换成是自己的母语，大家会感到更开心舒适…

• less than a min read
Chinese blog , Cadence blogs , ICADVM18.1 , ADE Explorer , ADE , Virtuosity , Custom IC Design , ADE Verifier , IC6.1.8 , ADE Assembler

Analog/Custom Design

Virtuoso Meets Maxwell: Here's All You Must Know to Create a TILP

Did you get a chance to look at the outstanding posts about Technology Independent…

• 3 min read
ICADVM18.1 , Virtuoso New Design Platform , video , Virtuoso Meets Maxwell , Virtuoso RF , RF design , TILP , Custom IC Design , Virtuoso Layout Suite , technology

System, PCB, & Package Design 

DATA Pulse: Playing Favorites with Parts—Influencing Design Part Selection with a…

Life is full of decisions - what college major to opt for, which career path to follow…

• 3 min read
allegro edm , PCB design

Breakfast Bytes

Sunday Brunch Video for 18th August 2019

https://youtu.be/xGAnEry49nw Made on my balcony (camera Carey Guo) Monday: Arm on…

• less than a min read
sunday brunch

PCB、IC封装：设计与仿真分析

Ken的博客系列之二 | 千兆位串行链路接口的SI方法

作者：Ken Willis 上一篇：通过“自上而下”的方法将SI推向上游 假设我们正在致力于PCI Express Gen 4串行链路的研发，数据的传输速率为16Gbps…

• less than a min read
SI , Chinese blog , ddr5 , DDR4 , IBIS-AMI , 中文 , SerDes , Sigrity , SystemSI , 信号完整性 , SI分析与建模

Breakfast Bytes

Maglev Trains

Earlier this week I was in Shanghai for CDNLive China. More about what was said there…

• 7 min read
cdnlive china , maglev , Shanghai

Analog/Custom Design

Virtuosity: Automated Device Placement and Routing - Grid Generation

This blog, the third one in the Automated Device-Level Placement and Routing series…

• 2 min read
ICADVM18.1 , Automated Device-Level Placement and Routing , VPR , Automatic Placement , Advanced Node , Virtuoso Placer , Layout EXL , APR , Auto P&R , Virtuoso , Virtuosity , Virtuoso Placement , Custom IC

Breakfast Bytes

Black Hat: Glitching Microcontrollers

As a paid-up member of the semiconductor community, the most interesting presentation…

• 5 min read
microcontrollers , black hat , glitch

Breakfast Bytes

CDNLive Taiwan 2019

I haven't been to Taiwan since the last time I worked for Cadence in the early 2000s…

• 5 min read
CDNLive , cdnlive taiwan

Whiteboard Wednesdays

Whiteboard Wednesdays - An Introduction to Palladium Cloud

In this week's Whiteboard Wednesdays video, Bennet Le provides an overview of the…

• less than a min read
Whiteboard Wednesdays , Cloud-based Design , Palladium XP , palladium cloud
CDNS - Fix Layout Hompage