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Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
• 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
• 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
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Blog - Post List
Latest blogs

Academic Network

Shift-Left Methodology for the Development of Hardware Accelerators Education Kit…

In order to describe the purpose of this education kit , let’s leave the EDA turf…

• 3 min read
virtual prototyping , featured , Education Kit , Tensilica , Stratus , SystemC , high level synthesis , helium

Life at Cadence

Hassle-Free Rigid-Flex PCB Bending EM Analysis

The functionality, safety, and effectiveness of devices using rigid-flex PCBs are…

• 4 min read
rigidflex , electromagnetic

Life at Cadence

Butterfly Network Puts Ultrasound on a Chip with Cadence

About two-thirds of the world’s population lacks access to medical imaging, whether…

• 1 min read
featured , designed with cadence , vision , butterfly network

Breakfast Bytes

2022 Kaufman Award Honors Giovanni De Micheli

This year's Kaufman Award honors Giovanni De Micheli, usually known as Nanni. Of…

• 5 min read
Kaufman Award , CEDA , IEEE , kaufman hall of fame , esd alliance

Verification

Unraveling PCIe 6.0 FLIT Mode Challenges

The PCIe 6.0 Specification released in 2021 doubles the performance to 64GT/s transfer…

• 6 min read
Verification IP , featured , verification strategy , Functional Verification , VIP , PCIe , pcie gen6 , verification

Analog/Custom Design

Virtuoso ICADVM20.1 ISR28 and IC6.1.8 ISR28 Now Available

The ICADVM20.1 ISR28 and IC6.1.8 ISR28 production releases are now available for…

• 2 min read
Analog Design Environment , Cadence blogs , ADE Explorer , cadence , Virtuoso RF Solution , IC Release Announcement blog , Virtuoso Visualization and Analysis XL , Layout EXL , ICADVM20.1 , IC Release Blog , Custom IC Design , Custom IC , IC6.1.8 , ADE Assembler , Virtuoso Layout Suite XL

Verification

Importance of MDIO Interface for Ethernet.

M edia I ndependent I nterface M anagement ( MIIM ), or M anagement D ata I nput…

• 1 min read
Verification IP , uvm , SoC verification , IP verification , Ethernet VIP , Functional Verification , Cadence VIP portfolio , MDIO Interface , Ethernet

Life at Cadence

How Is the Semiconductor Industry Handling Scaling: Is Moore's Law Still Alive?

The chip design industry is going through exciting times. Process nodes with smaller…

• 5 min read
advanced process nodes , Genus Synthesis Solution , Innovus Implementation

Digital Design

Relax in Summer with Cooler IC chips and Ice-Cream! Do you want to Explore the Recipe…

Are you passionate about cooking? Err... Don't think it is a regular cooking class…

• 1 min read
Low Power , Genus , IEEE 1801 , UPF , Synthesis

Breakfast Bytes

TSMC OIP Preview 2022

I have pointed out before that you really only get two opportunities a year to get…

• 2 min read
OIP , TSMC

Breakfast Bytes

Cadence Certus Closure Solution: Automated Full-Chip Optimization

Today, we announced the Cadence Certus Closure Solution, the first-of-its-kind fully…

• 2 min read
featured , Tempus , tempus eco , STA , static timing , certus

Life at Cadence

Artificial Intelligence Is Revolutionizing Computational Software

What does the term computational software mean? The shortest explanation is that…

• 4 min read
artificial intelligence , computational software , EDA , AI

Computational Fluid Dynamics

Last Week at Fidelity CFD

Rise and shine for another week in the world of CFD. Here's what you missed last…

• 3 min read
CFD , Marine Engineering , transition , FINE Marine , unsteady flow , turbomachinery , turbulence , tweak , Computational Fluid Dynamics , machine learning , webinar , nonlinear harmonic , cadencelive , Hydraulic Turbines , nlh , Mesh Generation

Breakfast Bytes

3D Heterogeneous Integration (3DHI)

Shakespeare (in Romeo and Juliet) wrote: What's in a name? That which we call a…

• 4 min read
system-in-package , SiP , featured , chiplet , 3dhi , system-on-chip , 3DIC , SoC , 2.5D IC , heterogeneous integration

Academic Network

Academic and Entrepreneur Tracks at CadenceLIVE Europe 2022

I am very happy to announce that registration for the in-person CadenceLIVE Europe…

• 2 min read

Verification

USB4 Version 2.0 Announced

USB Promoter Group has announced the pending release of the USB4® Version 2.0 specification…

• less than a min read
usb4

Computational Fluid Dynamics

Generate Quads/Hexes at the Speed of Trias

The quadrilateral-dominant meshing algorithm within Fidelity Pointwise generates…

• 4 min read
CFD , Meshing Monday , Pointwise , Fidelity CFD , engineering , simulation software , Cadence CFD , Meshing , meshing algorithms

Breakfast Bytes

Tesla AI Day 2022

On Friday, September 30th, from 6 pm until well after 9 pm Tesla held its AI Day…

• 6 min read
Automotive , tesla , optimus , SDC , robot , AI

Verification

Struggling with Coverage Convergence – Give your Verification Wings with Xcelium…

Functional verification consumes more than 70% of the labor invested in today’s SoC…

• 1 min read
coverage , machine learning , xcelium , simulation
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