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Serial link speeds have increased 25X in under 20 years, thus increasing the complexity of the IBIS algorithmic modeling interface (AMI) models used in simulating these links. With the increased speed and complexity of designs, it is crucial to analyze channels to ensure sufficient margin for error-free data transmission.

An exhaustive manual search method is typically used to find the best set of parameters for a given…

In the world of RF and analog design, understanding how circuits behave under periodic steady-state conditions is essential—especially when dealing with mixers, oscillators, LNAs, and power amplifiers. These circuits often operate in nonlinear regimes and involve frequency translation, making traditional transient analysis inefficient or even impractical.

The SpectreRF option, Cadence’s industry-standard RF simulation…

In the realm of RF and analog design, understanding how circuits behave under real-world, nonlinear conditions is critical. Whether you're designing power amplifiers, mixers, or oscillators, large-signal analysis is the key to ensuring performance, stability, and compliance.

The SpectreRF option, Cadence’s industry-standard RF simulation engine, offers two powerful methods for large-signal analysis:

• Harmonic Balance…

In semiconductor design, projects are remembered for their extremes—legendary successes and cautionary failures. The difference often hinges on when problems are discovered. A bug found late in development can derail timelines and budgets. This is why "shifting left"—moving testing and validation earlier in the process—is now a critical strategy for innovation.

Shifting…

Use a graphical view to help with debugging by harnessing visual tools to demystify complex verification environments

The rapid evolution of digital systems has brought a surge in design complexity, making functional verification a cornerstone of modern hardware development. SystemVerilog has emerged as a powerful language at the heart of this verification landscape, especially with its constraint-random…

Imagine, you're binge-watching your favorite web series. The plot is gripping, the characters are intense, and then—bam!—someone starts speaking in a language you don't understand. Panic? Nope. You calmly glance at the subtitles and keep munching your popcorn like a pro.

What if we say there is good news for all EDA enthusiasts! Our highly acclaimed training "Genus Synthesis Solution with Stylus Common…

In photonic integrated circuit (PIC) design, the Mach-Zehnder Interferometer (MZI) stands as a foundational building block. Whether used for modulation, switching, or sensing, its ability to manipulate light through interference makes it indispensable. Traditionally, schematic creation has been a manual and often tedious process, especially when dealing with complex waveguide geometries and thermal tuning elements. Enter…

As chip complexities increase and the industry evolved to more battery-powered devices, power aware/consumption research becomes an integral part of design in the industries. Low power is crucial in ASIC applications to ensure longevity, durability, and reliability. PCI-SIG has focused on reducing power consumption while the PCIe interface is active to enable better platform power management (PM). In the blog below, we will…

Modern compute systems have evolved beyond reliance on a single dominant interface. Today, they're increasingly defined by their ability to support multiple high-speed protocols concurrently—including PCIe, Ethernet, and others. This shift toward multi-protocol capability is fundamentally reshaping how we architect intelligent edge AI systems, especially as inferencing workloads grow more distributed, data-intensive…

Don't miss this opportunity to streamline your verification flow and achieve faster, higher-quality results. Join Cadence Training for the second day of this extended webinar series: Regressions, Coverage Integration, and Verification Closure—Streamlining Digital Front-End Design and Verification with Cadence Tools!

Navigating the Cadence front-end design and verification tool suite can be seamless when approached…

Plan, Simulate, and Debug: Streamlining Digital Front-End Design and Verification with Cadence Tools

Navigating the Cadence front-end design and verification tool suite can be seamless when approached as an integrated flow.  

Join the Cadence Training team for this two-part, extended webinar series where we do just that. Get insights from industry experts who guide you through a complete, integrated verification flow