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Featured

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか?」をテーマに、本田技術研究所社 先進技術研究所(HGRX)との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
Cadence Japan 8 Oct 2025 • less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
Sheryl G 7 Oct 2025 • 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
Corporate 2 Oct 2025 • 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
Corporate 1 Oct 2025 • 4 min read
Edge AI , featured , Ambarella
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Blog - Post List

Latest blogs

Verification

See Perspec Running Accellera Portable Stimulus Examples Here and Now!

Accellera has announced the release of an Early Adopter specification of the Portable…

Steve Brown 15 Jun 2017 • less than a min read
SoC verification , perspec system verifier , Accellera , pss , portable stimulus

Verification

Accellera Has Done It Again! Portable Stimulus Standard Available For Review

In a press release this morning, Accellera announced availability of an Early Adopter…

Steve Brown 15 Jun 2017 • 2 min read
CDNS , Perspec , Accellera , pss , portable stimulus

Analog/Custom Design

Virtuoso Video Diary: What is Virtuoso System Design Platform?

“Any sufficiently advanced technology is indistinguishable from magic.” ― Arthur…

deeptig 15 Jun 2017 • 4 min read
ADE Explorer , ADE , Virtuoso Layout Suite L , Schematic Editor , Virtuoso Video Diary , Sigrity , Custom IC Design , Allegro

Academic Network

Cadence Research Workshop in Duke Kunshan University

Cadence Academic Network (CAN) hosted a Cadence Research Workshop in Duke Kunshan…

Tracy Zhu 15 Jun 2017 • less than a min read
Cadence Academic Network , academic workshop , academia

Breakfast Bytes

Breakfast Bytes Brought to You By... KQED?

If you live in the Bay Area, you have almost certainly heard KQED's Forum program…

Paul McLellan 15 Jun 2017 • 6 min read
kqed , wired , mixed reality , fake reality , pbs , virtual reality , fake news , augmented reality

Analog/Custom Design

Virtuosity: New Modgen and Row-Based Placement Rapid Adoption Kits

Cadence Rapid Adoption Kits (RAKs) are designed to help users quickly adopt new technologies…

Priya Sriram 14 Jun 2017 • 3 min read
Row Region , EAD , Row Template , Modgen On Canvas , MODGEN , Rapid Adoption Kit , Virtuoso Placer , RAK , VLS GXL , Layout , Virtuosity , Custom IC Design , modgens , RAKs , Virtuoso Layout Suite , Row-Based Placement

Breakfast Bytes

Samsung Foundry Forum: Beyond FinFET and FD-SOI

This is the third post on the second Samsung Foundry Day held recently. The first…

Paul McLellan 14 Jun 2017 • 4 min read
IBM , envm , emram , horizontal nanosheet , rf-soi , GlobalFoundries , EUV , Breakfast Bytes , FD-SOI

Whiteboard Wednesdays

Whiteboard Wednesdays - 3 Market Forces Driving Commercial IP Adoption

In this week's Whiteboard Wednesdays video, Tom Hackett explains the 3 forces driving…

References4U 13 Jun 2017 • less than a min read
Design IP , Whiteboard Wednesdays , IP , interfaces

Breakfast Bytes

What's For Breakfast? Video Preview June 19th to June 23rd 2017

https://youtu.be/QtKiDx9yXAY Coming from the Staten Island Ferry NY (camera…

Paul McLellan 13 Jun 2017 • less than a min read
DAC , 54dac , Design Automation Conference

Breakfast Bytes

Samsung Foundry Forum: EUV

This is the second post on the second Samsung Foundry Day held recently. The first…

Paul McLellan 13 Jun 2017 • 5 min read
Samsung , samsung foundry , EUV , Breakfast Bytes

Analog/Custom Design

Virtuosity: I've Learned to Customize RTT Simulations...Bingo!

The Real-Time Tuning (RTT) assistant is one of the most powerful features of ADE…

Ashu V 12 Jun 2017 • 4 min read
Analog Design Environment , custom/analog , ADE Explorer , Explorer , ADE , Mixed-Signal , Virtuoso Analog Design Environment , Virtuoso , Analog Design Environment , Virtuosity , Custom IC Design

Breakfast Bytes

Samsung Foundry Forum: Roadmaps

I attended the second Samsung Foundry Forum. As seems to be traditional for foundries…

Paul McLellan 12 Jun 2017 • 4 min read
8nm , Samsung , samsung foundry , Qualcomm , 5nm , 7nm , 10nm , EUV , Breakfast Bytes

Verification

A Brief Introduction to Xcelium

Welcome to the XTeam blog! We are a team of bloggers dedicated to showcasing the…

XTeam 9 Jun 2017 • less than a min read
Low Power , digital mixed signal , Functional Verification , Multi-Core , xcelium , parallel simulation

Breakfast Bytes

Pre-Silicon Software Development with Protium and Palladium Platforms

We've already had CDNLive EMEA, but here is a look at a presentation from CDNLive…

Paul McLellan 9 Jun 2017 • 5 min read
debug , android , Protium , Palladium , embedded software , software development , linux , Breakfast Bytes

Breakfast Bytes

Schematic-Driven Simulation and Layout of Complex Photonic ICs

Photonics is transmitting data through fiber optic cables. As such, photonics is…

Paul McLellan 8 Jun 2017 • 5 min read
PhoeniX Software , Lumerical , silicon photonics , Virtuoso , photonics , Breakfast Bytes

Breakfast Bytes

Cadence at DAC

Yes, it's nearly here, the 54th Design Automation Conference in Austin, Texas (and…

Paul McLellan 7 Jun 2017 • 7 min read
DAC , Joe Costello , expert bar , Cadence Theater , 54dac , Denali Party , Accellera , cooley troublemaker panel , #54dac , pss , cadence lunches , Breakfast Bytes , portable stimulus standard

Whiteboard Wednesdays

Whiteboard Wednesdays - Von Neumann's 5 Bottlenecks and CCIX - Part 2

In this week's Whiteboard Wednesdays video, Tom Hackett completes the story of the…

References4U 6 Jun 2017 • less than a min read
Whiteboard Wednesdays , ccix

Breakfast Bytes

What's For Breakfast? Video Preview June 12th to June 16th 2017

https://youtu.be/oikFfm15nw8 Coming from Samsung@First (camera Sean) Monday…

Paul McLellan 6 Jun 2017 • less than a min read
kqed forum , embedded vision , Samsung , computer history museum , samsung foundry forum , EUV , FD-SOI

Digital Design

2017 Annual HLS Survey Results

As many of you know, Cadence (more correctly, “I”) recently performed an industry…

dpursley 6 Jun 2017 • 4 min read
High-Level Synthesis , survey , Stratus , HLS
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