Cadence Blogs

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan 8 Jan 2026 • less than a min read

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate 6 Jan 2026 • 1 min read

news story , featured , Cadence Culture

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan 22 Dec 2025 • less than a min read

news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar 17 Dec 2025 • 4 min read

IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog

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プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan 8 Jan 2026 • less than a min read

news story , featured , Cadence Culture , japanese blog

Learning and Support

Cadence ASK: 2025 Highlights and What’s Next!

As we step into 2026, let's celebrate the advancements and shared successes in 2025…

ulrike 8 Jan 2026 • 3 min read

digital badge , live training , blended training , certified , accelerated learning , Cadence live , learning map , GenAI , FAQ , resources , troubleshooting , learning and support , ask , technology

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate 6 Jan 2026 • 1 min read

news story , featured , Cadence Culture

Did You See? Mandarin Subtitles Are Live for Innovus Training—Here’s Your Start

I don't speak many languages, but I happily watch web series in different languages…

P Saisrinivas 6 Jan 2026 • 5 min read

ECO , Static timing analysis , SI , online courses , Innovus Implementation System , Routing , Floorplanning , Implemetation , training , training bytes , clock tree synthesis , Mandarin , physical design , Timing analysis , CTS , Placement , Buffer , block level implemetation , Inverter

Modular Magic: Accelerate Chip Design with Genus Bottom-Up Flows

Let's face it: tackling a modern SoC design top-down is like trying to eat a triple…

Neha Joshi 6 Jan 2026 • 6 min read

online courses , bottom-up flow , modular , optimization , training bytes , Genus Synthesis Solution , Synthesis , online training

Mini Clips, Mini Videos, Mega Crave: Why Short Reels Dominate Screens

The first thing most of us do today isn’t opening a book or a laptop; it’s unlocking…

P Saisrinivas 5 Jan 2026 • 4 min read

Physical verification , Digital Implementation forums , online courses , Innovus Implementation System , Floorplanning , RTL-to-GDSII , training , YouTube , Cadence training , youtube videos , training bytes , Digital Implementation , physical design , Timing analysis , Genus Synthesis Solution , VLSI Design , Tempus Timing Signoff Solution , physical implementation

カスタムIC／ミックスシグナル

Virtuoso Studio: LPP Transparencyを用いてデザインを明瞭に表示する

これは、Virtuoso Studio IC 25.1のリフレッシュに関する5部構成のブログシリーズの第3弾です。最も混雑したレイアウトでも簡単にナビゲートできるように設計された…

Custom IC Japan 25 Dec 2025 • less than a min read

Cadence blogs , Virtuoso Studio , japanese blog , Custom IC Design , Custom IC

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan 22 Dec 2025 • less than a min read

news story , ucie , featured , chiplets , TSMC N3P , 64G , chiplet connectivity

3D-IC Market Outlook: Technology Roadmaps, Readiness, and Design Implications

The 3D-IC market outlook is entering a decisive phase as the semiconductor industry…

Reela Samuel 22 Dec 2025 • 7 min read

cadence , advanced packaging , Cadence Integrity 3D IC Design Platform , 3D-IC Technology , 3D-IC Market Outlook

Cadence 3D-IC Success Stories: Faster Bandwidth, Lower Power, On-Time Tapeouts

As scaling at advanced nodes becomes increasingly constrained by cost, yield, and…

Reela Samuel 19 Dec 2025 • 6 min read

advanced packaging , tapeouts , hetrogenous integration , Cadence Integrity 3D IC Design Platform , 3D-IC Technology , faster bandwidth

3D-IC Test and Reliability: KGD Strategies, Access Architecture, & Failure Mode

3D-IC technology is redefining how advanced systems are built, but it also introduces…

Reela Samuel 18 Dec 2025 • 7 min read

Celsius Thermal Solver , Allegro X AI , Integrity 3D-IC Platform , kgd , advanced packaging , Yield management , multi-die 3d-ic solution , 3D-IC Technology

The India Circuit

Story of Badavath Shiva Kumar - Cadence Scholarship Program

Shiva Kumar's journey from the rural village of Mandamaari in Telangana’s Mancherial…

Asim Khan 18 Dec 2025 • 1 min read

CadenceCares , CadenceScholarshipProgram , cadence , Cadence India

Accelerate Your Design Signoff with Cadence Voltus Training Kit

By Ronen Stilkol, Senior AE Architect In the rapidly evolving world of semiconductor…

Vinod Khera 17 Dec 2025 • 6 min read

si/pi , fault coverage , voltus training kit , signoff

RF /マイクロ波設計

Microwave Office 用の村田製作所の新しいライブラリ

表面実装キャパシタを含むすべての電子部品は、その物理的構造（リード、内部構造、PCB 配線）により、理想的な電気的動作から逸脱する望ましくない寄生特性を持っています…

RF Design Japan 17 Dec 2025 • less than a min read

AWR Design Environment , Parastics , RF design , microwave office , Passives , japanese blog , Matching networks , Murata

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar 17 Dec 2025 • 4 min read

IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog , IC Release Blog , Custom IC Design

RF Engineering

New Murata SMD Library for Microwave Office Support

Due to their physical construction (leads, internal structure, PCB traces), all electronic…

StandingWaves 17 Dec 2025 • 2 min read

AWR Design Environment , RF design , microwave office , Passives , Matching networks , Murata , parasitics