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Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog

Corporate News

Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs

Cadence has unveiled 10 Verification IP (VIP) for key emerging interfaces tuned for…

Corporate
• 1 min read
news story , Verification IP , featured
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Latest blogs

Corporate News

Captivating Advances in Olympic Broadcasting Technology

From the early years of radio transmissions to the modern era of ultra-high-definition…

• 6 min read
EDA tools , Olympics , Broadcasting Technology , 2024 Paris Olympics , technology , chips

Verification

LPDDR5X Opening New Markets for Low-Power DRAMs

Low-power DDR SDRAM has been one of the most widely used memories in the semiconductor…

• 4 min read
Verification IP , Low Power DRAMs , Memory , LPDDR Market , LPDDR , VIP , JEDEC , lpddr5 , lpddr5x , verification

System, PCB, & Package Design 

Cadence OrCAD X and Allegro X 23.1 HotFix 003 is Now Available

The HotFix 003 (QIR 1) update for OrCAD X and Allegro X 23.1 release is now available…

• 7 min read
OrCAD X Capture CIS , Cadence Design Systems , padstack editor , Sigrity Aurora , featured , new features , Allegro X PCB Editor , PSpiceA/D , Allegro X Advanced Package Designer , what's new , APD , Cadence Doc Assistant , CDA , PSPICE , hotfix , PCB design , OrCAD X Presto , OrCAD X , 23.1 , Pulse , allegro x , HotFix 003 , Allegro X System Capture

Digital Design

Cadence Learning and Support: Installation and Licensing Help via Chatbot

In recent years, the requirements and performance goals for designers have become…

• 2 min read
COS , chatbot , Cadence Online Support , training bytes , Digital Implementation , cadence learning and support

Spotlight Taiwan

Cadence與Arm - 雙強聯手全速推動車用Chiplet生態系

本文翻譯自Cadence Community Blogs原文: Jumpstarting the Automotive Chiplet Ecosystem 汽車產業正在技術復興的轉折點…

• less than a min read
Automotive , ucie , chiplet , taiwanese blog , ARM

Analog/Custom Design

Performing Automated Analog Checks by UVM-MS Verification Environment

In this Knowledge Booster blog, we talk about the need to verify analog/mixed-signal…

• 2 min read
UVM-MS , Cadence training , Cadence Learning and Support portal , mixed-signal verification

Data Center

New Integration for Always-Ready Data Center Digital Twin Models

Garbage in, garbage out. A digital twin is only as good as the data you feed it.…

• 6 min read
integration , data center , digital twin , simulation software , thermal

Learning and Support

Boost Your Design Efficiency with the Cadence Community Forums

Are you tired of searching online for design solutions? How easy it would be for…

• 1 min read
PCB , CFD , Allegro X AI , Community , cadence , awr , designed with cadence , SPB , design , PCB design

PCB解析／ICパッケージ解析

Celsius Studio: 熱エンジニアと電気エンジニアの垣根を取り払う

今日の電子設計における熱問題は、3D-ICのような先端ノードとヘテロジニアス・インテグレーションにより、著しく困難になっています。消費電力の増加や面積の縮小により…

• less than a min read
Celsius Thermal Solver , celsius , thermal management , Celsius Studio , Thermal Analysis , japanese blog

カスタムIC／ミックスシグナル

Spectre Tech Tips: Spectre Sパラメタ品質チェック及びフィッティングツール

Spectre では nport エレメントを使う事で S パラメタデータを取り込み、時間及び周波数ドメインで回路シミュレーションが可能です。この S パラメタの品質が悪い場合…

• less than a min read
S-parameter , quality checking , Spectre RF , fitting tool , Spectre Circuit Simulator , japanese blog , Spectre X Simulator

Corporate News

The Dynamic Design and Digital Dialogues of Olympic Venue Architecture

In the enchanting realm where sports and architecture collide, a realm of grandeur…

• 4 min read
architecture , computational software , Olympics , 2024 Paris Olympics , technology

Computational Fluid Dynamics

Making Shipping Greener Part I: Trim Optimization Using Fine Marine

This blog series focuses on the role of computational fluid dynamics (CFD) in reducing…

• 5 min read
FINE Marine , marine design , Trim optimization , sustainable , Computational Fluid Dynamics , simulation software

Life at Cadence

DEI@Cadence: Celebrating IWD 2024 at Cadence Ireland

Diversity, equity, and inclusion (DEI) are not just words but values that are exemplified…

• 3 min read
inclusion , Culture , IWD 2024 , Women at Cadence , Cadence Ireland , cadence europe , diversity , inspireinclusion

Life at Cadence

Navigating Life and Work with Data-Driven Precision

Each year, International Women's Day is commemorated as a salute to the accomplishments…

• 5 min read
data , International Women's Day , analytics , Women in Technology

The India Circuit

Gaurav Rajora: From Resettlement to Resilience

In the heart of a resettlement colony in Delhi, Gaurav Rajora, a young man with a…

• 2 min read
CadenceCares , CadenceScholarshipProgram , cadence , Cadence India

Digital Design

Cadence Learning and Support: New Courses Section in Content Notification Email

As you may already know, you can get notified via Cadence Learning and Support website…

• 2 min read
Cadence Online Support , training , Digital Implementation , online training , cadence learning and support

カスタムIC／ミックスシグナル

アナログレイアウトにおけるMOSFET差動対の寄生成分を揃えるには

By Mark Williams, Sr Software Engineering Group DirectorTranslator: Masaru Yasukawa…

• less than a min read

カスタムIC／ミックスシグナル

アナログレイアウト中のカレントミラー構造

By Mark Williams, Sr Software Engineering Group DirectorTranslator: Jiale Dou カレントミラーは…

• less than a min read

Digital Design

Learn Fast and Make Things

“Move fast and break things,” a motto coined by Mark Zuckerberg, captures the ethos…

• 2 min read
digital badge , place and route , Digital Implementation , Innovus , online training
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