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Honda + Cadence = Physical AI (part 1): What Does “Physical AI” Really Mean?

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The more widely the term …

Corporate
• 7 min read
featured , physical ai , HGR , AI , Honda

Corporate News

Design for AI and AI for Design

The semiconductor industry is experiencing a once-in-a-generation transformation…

Corporate
• 6 min read
Allegro X AI , featured , infrastructure ai , agentic ai , Integrity 3D-IC Platform

Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Artificial Intelligence (AI)

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design
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Blog - Post List
Latest blogs

Breakfast Bytes

CadenceLIVE: Xilinx's Thunder-Bus

At CadenceLIVE Americas in June, Raghukul presented on Thunder-Bus, a low-latency…

• 2 min read
protium x2 , Protium , xilinx

SoC and IP

PCIe for Automotive - DesignCon/DriveWorld 2021

DesignCon 2021, Drive World Conference, and Embedded Systems Conference are a joint…

• 3 min read
CXL , Design IP , IP , featured , PCIe Gen4 , ip cores , PCI , PCIe PHY

Academic Network

Academic and Entrepreneur Tracks at CadenceLIVE Europe 2021

CadenceLIVE Europe 2021 will be hosted on October 19th. This year will be a virtual…

• 2 min read
Entrepreneur , Cadence Academic Network , Master Thesis Award , cadencelive

Computational Fluid Dynamics

CFD, Cars, and Cadence - Two Events Next Week

The Cadence CFD team is excited about two automotive engineering events next week…

• 1 min read
CFD , Automotive , Pointwise , Computational Fluid Dynamics , CFD Applications , Mesh Generation , Omnis

Breakfast Bytes

Rowhammer: Beating DRAM into Submission

Way back in 2014, a DRAM vulnerability called Rowhammer was revealed. This is a silicon…

• 5 min read
security , ddr5 , Memory , DDR4 , JEDEC , DRAM , rowhammer

Life at Cadence

My Life at Cadence: Nick Phillips

People come to Cadence to have meaningful careers, work with some of the brightest…

• less than a min read
Insights on Culture , Culture , cadence , GPTW , my life at cadence , great place to work , cadence emea

Breakfast Bytes

Tensilica ConnX B10 in GF 22FDX for Automotive Grade 1

At CadenceLIVE Americas back in June, GlobalFoundries presented a case study on using…

• 4 min read
adaptive body bias , 22fdx , abb , gf , GlobalFoundries , FD-SOI

Breakfast Bytes

BlackHat: Hacking a Capsule Hotel—Ghost in the Bedrooms

Security conferences always seem to have at least one interesting presentation that…

• 6 min read
security , blackhat

System, PCB, & Package Design 

ASCENT: Accessing System Capture Functions Through a Browser-Based Dashboard

So, if you are an electronics design program manager or team manager, it’s unlikely…

• 2 min read
17.4-2019 , Allegro System Capture , ASCENT , 17.4-QIR3

Breakfast Bytes

Aerospace and Defense Day

At the end of July, Cadence had its CadenceCONNECT Aerospace and Defense Day. For…

• 4 min read
A&D , RF , celsius , 3D-IC , awr , Analysis , thermal , aerospace & defense , Custom IC , clarity

System, PCB, & Package Design 

IC Packagers: What Else Is There to Know About the New Release?

Last week we looked at new features largely targeting your manufacturing flow. Layer…

• 6 min read
17.4 QIR3 , IC Packaging and SiP , APD , IC Packagers , Allegro Package Designer , 17.4-2019

Computational Fluid Dynamics

This Week in CFD

A brief notice here that this Friday the 13th is also This Week in CFD day. Of note…

• less than a min read
CFD , Automotive , Pointwise , fine/marine , jobs , Computational Fluid Dynamics , CFD Applications , Mesh Generation

System, PCB, & Package Design 

BoardSurfers: Reasons to Move to 17.4-2019 Hotfix019 of Allegro PCB Editor

Cadence OrCAD and Allegro 17.4-2019 Hotfix 019 was rolled out in mid-July and is…

• 4 min read
PCB , Models , BoardSurfers , 3D Canvas , what's new , PCB Editor , Layout , 17.4-2019 , hotfix 019 , Allegro PCB Editor , microvia , 17.4-QIR3 , Allegro

System, PCB, & Package Design 

(P)SpiceItUp: Speed and Reliability Through Tried and Tested TI-PSpice Models

When time and quality are at a premium and you are in a hurry to meet a tight schedule…

• 4 min read
17.4 , Models , OrCAD Capture , PSpiceA/D , (P)SpiceItUp , 17.4-2019 , hotfix 019 , library , Allegro

PCB設計／ICパッケージ設計

(P)SpiceItUp: PSpice Part Searchを用いて、カテゴリ、概要、または機能 (Category, Description, or Function…

設計者としては、回路設計の初期段階での要件はまったく異なります。つまり、回路デザインを実装するときに必要な部品情報と、テストや解析のためにシミュレーションするときに必要な部品情報は性質が異なるのです…

• less than a min read
OrCAD Capture , PSpiceA/D , (P)SpiceItUp , PSPICE , 17.4-2019 , OrCAD , japanese blog

PCB設計／ICパッケージ設計

(P)SpiceItUp: ５ステップによるシミュレーション プロファイル

回路が完成したら、いよいよシミュレーションを行います。最初のステップは、シミュレーション プロファイルの定義です。シミュレーション プロファイルは、どのような解析を実行するか…

• less than a min read
PSpiceA/D , PSPICE , 17.4-2019 , OrCAD , japanese blog

PCB設計／ICパッケージ設計

(P)SpiceItUp: 相対と絶対公差による精度と速度の管理におけるオプションのパワー

PSpice®には、Simulations SettingsダイアログボックスのOptionsタブに、強力でありながら見落とされがちな機能があります。このタブに用意されているデフォルト値は…

• less than a min read
OrCAD Capture , PSpiceA/D , logical design , (P)SpiceItUp , PSPICE , japanese blog , simulation

PCB設計／ICパッケージ設計

(P)SpiceItUp: PSpice A/DでISO 7637-2標準パルス2aの生成

多くの場合、業界標準に準拠したデバイスのテストに使用できる標準的なパルス波形を作成する必要があります。 その一例として、回路図の設計段階でISO 7637-2トランジェントをシミュレーションする方法があります…

• less than a min read
OrCAD Capture , PSpiceA/D , Capture CIS , PSPICE , 17.4-2019 , japanese blog

PCB設計／ICパッケージ設計

ASCENT: Allegro System Captureでのデザインのリユース

今回は、ロジカルデザインとボードの作成に長い経験がある方にお伝えしたい内容をブログにしました。ほとんどの場合、製品やデザインの新規作成において、すべての部品やモジュールを一から作成する必要はありません…

• less than a min read
system level design , 17.4-2019 , Design Reuse , Allegro System Capture , japanese blog , ASCENT , Schematic
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