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Cadence Certifies AI-Driven Reference Flows for Intel 18A-P and Intel 14A

The expanded Cadence-Intel Foundry collaboration delivers silicon-proven digital…

Corporate
• 3 min read
DAC , Design IP , featured , DAC 2026 , AI-Driven Design

Corporate News

The Autonomous Chip-to-System Engineer Has Arrived

How Cadence, in collaboration with NVIDIA, is building the industry's first silicon…

Corporate
• 4 min read
AuraStack AI Super Agent , DAC , featured , agentic ai , NVIDIA

Corporate News

Cadence’s Agentic AI Design Vision Takes Center Stage at DAC

AI infrastructure demands are changing what semiconductor design must solve. The…

Corporate
• 4 min read
AuraStack AI Super Agent , featured , agentic ai , DAC 2026 , ChipStack AI Super Agent

Corporate News

AI Infrastructure Starts Beyond the Chip

Why Advanced Packaging and PCB Design Have Become the Next Frontier of Innovation…

Corporate
• 8 min read
chip , featured , AI infrastructure , agentic ai , packaging
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Life at Cadence

AI Everywhere and for Everyone!

Cadence helps deploy Energy Efficient, Intelligent Devices over the Edge The AI…

• 6 min read
ml , ai-driven , AI

Breakfast Bytes

How to Build a Data Center: It's All About the SerDes...and Thermal

Okay, you are probably not going to have to build a data center. But you might well…

• 5 min read
Ethernet , PCIe , hyperscale , SerDes , datacenter

Computational Fluid Dynamics

I'm Marc Tombroff and This Is How I Mesh

You may be thinking, "He's not Marc Tombroff" and "What's this how I mesh?" First…

• less than a min read
CFD , NUMECA

Breakfast Bytes

On-Device Artificial Intelligence the Tensilica Way

This morning, at a workshop at the AI Hardware Summit, Cadence is laying out details…

• 3 min read
artificial intelligence , deep learning , inference , Tensilica , neural networks

Breakfast Bytes

Sunday Brunch Video for 12th September 2021

https://youtu.be/7gCLOVo1XQQ Made at Tesla Factory, Fremont (camera Ziyue Zhang…

• less than a min read
sunday brunch

Breakfast Bytes

Cadence in Brazil

How much do you know about Brazil? Probably, like me, not that much. And most of…

• 4 min read
Cadence Academic Network , belo horizonte , sbmicro , cadence brazil , brazil

Computational Fluid Dynamics

What Our Interns Did This Summer on Cadence's Pointwise Meshing Team

There's just one problem with summer interns. As soon as you get to know them, they…

• 6 min read
CFD , Interns , internships , Pointwise , structured grids , Computational Fluid Dynamics , CFD Applications , Mesh Generation

Breakfast Bytes

New Cerebrus Webinar This Month

Cerebrus is Cadence's new machine learning-enabled digital design environment. When…

• 2 min read

Computational Fluid Dynamics

Upcoming NASA Seminar on Adaptive Meshing

Tomorrow morning, Cadence's Travis Carrigan and Nick Wyman will be participating…

• 1 min read
CFD , boundary layer , T-Rex , Computational Fluid Dynamics , adaptation , Meshing

Breakfast Bytes

NOT CHIPS: Tesla's Project Dojo

Nope, NOT CHIPS is not a misprint. Tesla didn't present at HOT CHIPS. But they did…

• 5 min read
project dojo , dojo , tesla

カスタムIC／ミックスシグナル

Virtuoso Meets Maxwell: Export Die GUIが機能強化されさらに便利になりました

'Virtuoso Meets Maxwell' はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です…

• 1 min read
Transfer Area , die export , IO pads , Virtuoso Meets Maxwell , Virtuoso RF Solution , Virtuoso RF , die , pin numbering , ICADVM20.1 , japanese blog , Custom IC Design , Virtuoso Layout Suite EXL , shapes , bumps , VMM

Computational Fluid Dynamics

It's a Wrap! Cadence CFD at Aerovehicles-4 and AutoCFD-2

That’s a wrap! One week and two different CFD events in the automotive world and…

• 1 min read
CFD , Automotive , Pointwise , Computational Fluid Dynamics , CFD Applications , adaptation , Mesh Generation , Omnis

Computational Fluid Dynamics

This Week in CFD

It's Friday, the weekend is upon us, and it's time for This Week in CFD. I am particularly…

• less than a min read
CFD , Pointwise , Computational Fluid Dynamics , Omnis

Breakfast Bytes

HOT CHIPS: The Next-Generation of General-Purpose Compute

At the recent HOT CHIPS, the first day opened with the chips that you first think…

• 5 min read
Intel , AMD , ponte vecchio , IBM , hot chips

PCB設計／ICパッケージ設計

IC Packagers: 新リリースには新しいものがたくさん！

第3回目となる今回のブログでは、メジャーアップデートでの最大の新機能をご紹介します。本連載の第1回と第2回では、パフォーマンスの向上からグラフィックキャンバスの改善まで…

• less than a min read
Allegro Package Designer , 17.4-2019 , IC Packager , japanese blog

PCB設計／ICパッケージ設計

IC Packagers: 新しいリリースについて他に知っておくべきことは？

先週は、主に製造工程を対象とした新機能をご紹介しました。レイヤベースのデガス処理の改善、鋭角補正、そしてオリジナルのデザインに対して意図した製造マスクのレイアウト対レイアウト比較を行うツールなどです…

• less than a min read
Allegro Package Designer , 17.4-2019 , IC Packager , japanese blog

PCB設計／ICパッケージ設計

IC Packagers: 17.4-2019 Hotfix 019 リリース！その意味とは？

17.4-2019リリースのHotFix 019のダウンロードとインストールが可能になりました。今回のリリースは、3回目のメジャーアップデートとなり、多数のバグフィックス…

• less than a min read
IC Packagers , Allegro Package Designer , 17.4-2019 , japanese blog

PCB設計／ICパッケージ設計

IC Packagers: In-Design Analysisフローを利用したシグナルインテグリティ問題の分析、シミュレーションと解決

ICパッケージの設計サイクルがますます短くなっている今日、配線の問題をできるだけ早期に発見して修正することがほぼ必須となっており、シミュレーションは設計サイクルに不可欠な要素となっています…

• less than a min read
IC Packagers , Allegro Package Designer , 17.4-2019 , japanese blog

PCB解析／ICパッケージ解析

高速メモリインターフェイスのSI/PI解析を実行するには？

DDR4やDDR5などのメモリインターフェイスの実現を成功させる任務のシグナルインテグリティ（SI）エンジニアは、その仕様をタイムリーに満たす上で大きな課題に直面しています…

• less than a min read
DDR , Sigrity , japanese blog
CDNS - Fix Layout Hompage