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Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
• 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
• 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
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Blog - Post List
Latest blogs

System, PCB, & Package Design 

BoardSurfers: Exploring the Dimensioning Environment

Dimensioning features specify the measurements of different design elements, such…

• 4 min read
PCB , dimensioning and drafting , dimensioning , BoardSurfers , 22.1 , PCB Editor , PCB design , Allegro PCB Editor , Allegro

Breakfast Bytes

IEDM: TSMC N3 Details

As you know from previous blog posts, I attended IEDM in San Francisco in December…

• 6 min read
featured , n3e , 3nm , n3 , TSMC , finflex

Verification

Flex Ethernet (FlexE): Unlocking the Physical Bandwidth Constraints

Efficient and flexible use of bandwidth is the key to optimizing traffic flow for…

• 3 min read
Verification IP , 5G Network , Ethernet VIP , Functional Verification , FlexE , VIP , Flex Ethernet , Ethernet , Hyperscalers , data centers , OIF , verification

カスタムIC／ミックスシグナル

Start Your Engines: ミックスシグナル・ビヘイビア・モデリングのレビューとコーチング

Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により…

• less than a min read
AMS , ADE Explorer , AMS Designer , mixed signal solution , Mixed-Signal , Virtuoso Analog Design Environment , analog/mixed-signal , japanese blog , mixed-signal solution , AMS Verification , mixed-signal verification , ADE Assembler

Computational Fluid Dynamics

Last Week at Fidelity CFD

While a large contingent of Fidelity CFD team members are at the AIAA SciTech Forum…

• 2 min read
CFD , turbomachinery , Computational Fluid Dynamics , fluid dynamics , T-Rex meshing , Fidelity CFD , Aerospace Engineering , cadencelive , Mesh Generation , Conferences

Breakfast Bytes

Design Enablement of 2D/3D Thermal Analysis and 3-Die Stack

At CadenceLIVE Europe back in November, one of the presentations was by Mohamed Naeim…

• 4 min read
3DIC , imec , CadenceLive Europe , cadencelive , thermal

Computational Fluid Dynamics

5 Small Features for Easy Meshing in Fidelity Pointwise

The big powerful features such as unstructured quadrilateral surface meshing, unstructured…

• 2 min read
CFD , Meshing Monday , Cell count , Small Features , engineering , simulation software , Mesh Generation , Cadence CFD , Fidelity Pointwise

Breakfast Bytes

Sunday Brunch Video for 22nd January 2023

https://youtu.be/ARCzcdPvLZg Made at Castle Rock State Park (camera Carey) Previous…

• less than a min read
sunday brunch

Breakfast Bytes

ST's Experience with Cadence Cerebrus

At CadenceLIVE Europe back in Thanksgiving week, one of the presentations was by…

• 3 min read
cerebrus , CadenceLive Europe , cadencelive , stmicroelectronics

Corporate News

AMD Is Designing Their EPYC Server Processors with the Dynamic Duo

AMD are known for creating some of the world’s most advanced processors. AMD’s EPYC…

• 1 min read
designed with cadence

Breakfast Bytes

Malcolm Penn: “We Are Stoking Capacity Just When We Don’t Need It”

On Tuesday this week, Malcolm Penn of Future Horizons gave one of the three annual…

• 4 min read
future horizons , featured , malcolm penn

Analog/Custom Design

Start Your Engines: Running Post-Layout Mixed-Signal Simulations with a More Complex…

Cadence ®︎  Spectre ®︎  With the DSPF-in-the-middle feature, designers can easily…

• 2 min read
AMS , AMS Designer , Start Your Engines , DSPF , Mixed-Signal , AMS simulation , Custom IC Design

SoC and IP

FMEDA-Driven SoC Design of Safety-Critical Semiconductors

Written by Francesco Lertora and Robert Schweiger 1.1 Introduction The growing…

• 8 min read
Safety Solution , Genus , functional safety , Midas Safety Platform , featured , Xcelium Safety , Jasper FSV , Verisium Manager Safety , USF , Automotive Option , Safety Analysis , Innovus , FMEDA , ISO 26262 , Virtuoso Assembler , Unified Safety Format , Safety Verification , Safety Compliance , Legato Reliability , Safety-aware Implementation

Verification

What Makes a Next-Generation Debug Solution?

For the past few decades, design and verification technology have made great progress…

• 5 min read
Functional Verification , debugging tips , debugging

Analog/Custom Design

Spectre Tech Tips: Dynamically Changing Spectre X Solver Settings

Spectre APS supports dynamically changing errpreset or reltol during a transient…

• 3 min read
Circuit simulation , spectre x , SPICE

Verification

Improve Regression Throughput and Find Bugs at Pace

Scaling chip size and increasing functionality over SoCs has increased complexity…

• 4 min read
xcelium simulator , Xcelium ML A

Breakfast Bytes

Improving RISC-V Processor Quality with Verification Standards and Advanced Meth…

At the RISC-V Summit in December, there were presentations halfway between a keynote…

• 4 min read
risc-v , Imperas , verification

Verification

Automating Data Coherency and Performance Testing of High-Speed SoCs with CXL In…

2023 is here, and technology trends around Compute Express Link (CXL) and the next…

• 2 min read

Digital Design

Training Insights - What's Your Weekend Plan? How About an Interactive Tour of the…

Well, we know you are busy, but it's time to develop your expertise in the synthesis…

• 3 min read
digital badge , Genus , training bytes , Synthesis , online training , Online Support
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