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Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
• 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
• 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
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Blog - Post List
Latest blogs

SoC and IP

Scale-Up and Scale-Out IP for Optical Interconnect for Accelerated Computing

Optical connectivity is foundational to modern data centers, enabling high-bandwidth…

• 4 min read
featured , AI data center , AI factory , Data Center architecture

Corporate News

From Cloud to Sensor: Neuronova on Building Truly Efficient AI Sensors

As AI moves from the cloud to the edge, power is becoming the new bottleneck, replacing…

• 6 min read
designed with cadence , AI

Cadence Japan

日本ケイデンス、「働きがいのある会社」 ベスト１００に5年連続で選出

日本ケイデンス・デザイン・システムズ社（横浜市港北区新横浜）は、Great Place To Work® Institute Japan（以下、GPTW Japan…

• less than a min read
news story , Culture , featured , japanese blog

Data Center

What Is Power Usage Effectiveness (PUE) in Data Centers?

Why PUE Still Matters Walk into a modern AI data center, and the first thing you…

• 7 min read
data center , Data Center Design , PUE , digital twin , Celsius Studio , Reality Digital Twin , data center digital twin , Power Usage Effectiveness , Data Center architecture

Corporate News

Neuronova – Scaling Ultra-Low-Power Edge Intelligence for Smart Devices

For decades, the data collection pipeline for sensors has been the exact same—measure…

• 2 min read
designed with cadence

Analog/Custom Design

A Journey Through 2025: Learning, Innovation, and Momentum

Cadence Training 2025 Year in Review: 30 New Blogs, Accelerated Learning Expansion…

• 5 min read
online_training , Accelerated_Learning , live_training , Virtuoso Studio , pegasus , VirtuosoADE , Training_Byte , webinar , Layout , learning map , digital_badge , EMX Solver , Custom IC

System, PCB, & Package Design 

Clarity Solver’s Automated Channel Extraction (ACE) to Be Featured at DesignCon

Visit us at DesignCon 2026 , February 24-26, at booth 827, to discover Clarity 3D…

• 1 min read
Power Integrity , Signal Integrity , Clarity 3D Solver

Digital Design

Bite-Sized Learning for Big SoC Challenges: Genus Training Bytes

In the fast-paced world of digital design, every engineer knows the truth: tapeout…

• 5 min read
digital design , videos , online courses , optimization , training bytes , Genus Synthesis Solution , Synthesis , online training

Data Center

Data Center Cooling: Thermal Management, CFD, & Liquid Cooling for AI Workloads

Data center cooling is now a first-order design constraint, not an afterthought,…

• 6 min read
data center , data center cooling , digital twin , Celsius Studio , Cadence Reality Digital Twin Platform

Spotlight Taiwan

您看到了吗？Innovus 培训现已推出中文普通话字幕—这是您的入门指南

我不会说多种语言，但我乐于观看不同语言的网络剧集。您知道是如何做到的吗？ 我相信许多人都有同样的做法，并且我们都知道答案：这得益于字幕的帮助。它们帮助我们观看任何剧集或电影…

• 1 min read
DSG , Taiwan , online courses , 物理设计 , STA , 时序 , Cadence training , taiwanese blog , Innovus , implementation , 静态时序分析 , AI , 完整的英文句子或段落 , Innovus Implemenetation system

Spotlight Taiwan

經濟部長拜訪Cadence總部 強化臺美半導體與AI設計合作

2026年1月26日，臺灣新竹—經濟部部長龔明鑫於美西時間 1月23日 (五) 訪問美國矽谷，並拜會全球電子設計自動化 (EDA) 領導廠商益華電腦Cadence…

• less than a min read
Taiwan , 3D-IC

Data Center

Data Center Design and Planning

Data centers form the backbone of everything from EDA workloads to innovation and…

• 7 min read
Data Center Design , data center cooling , digital twin , rack layout , Data Center architecture , Cadence Reality DC

Digital Design

Innovus+ Platform: Now You Can Synthesize Your Design Using Innovus!

Are you looking for a single integrated platform that runs both synthesis and implementation…

• 3 min read
cadence latest , Synthesis to Timing Signoff , Digital Design and Signoff , Innovus Implementation System , Innovus+ Synthesis , integrated signoff , AI Assistant , 3DIC , Cadence Online Support , PPA Improvement , RTL-to-GDSII , training , Cadence training , Digital Implementation , Innovus+ platform , Innovus , implementation , physical design , Genus Synthesis Solution , productivity , Synthesis , Innovus+

Learning and Support

Unlocking AI-Driven Chip Optimization with Cadence Cerebrus

Join us for a technical deep-dive into the future of digital implementation with…

• 2 min read
webinar , Cadence training , Innovus

System, PCB, & Package Design 

Ascent: Training Insights: Version Control in Allegro X PCB System Capture

In today’s fast-paced PCB design environment, managing design changes efficiently…

• 3 min read
System Capture , SPB

Spotlight Taiwan

Genus 培訓中文字幕現在已上線了！

想像一下：你在瘋狂追看你最愛的網劇，劇情緊湊、角色精彩。突然有人開始說你完全聽不懂的語言。慌了嗎？當然不！你淡定一瞄字幕，繼續像高手一樣嗑著爆米花。 各位 EDA…

• 1 min read
Course , training , Mandarin , Genus Synthesis Solution , online training

Analog/Custom Design

Virtuoso Studio IC23.1 ISR17 Now Available

Virtuoso Studio IC23.1 ISR17 production release is now available for download.

• 2 min read
Virtuoso Studio , IC Release , Virtuoso , IC Release Announcement , Custom IC Design , Custom IC , IC design , IC23.1

System, PCB, & Package Design 

Celebrating 2025, an Inspiring Year, with the Cadence Community!

2025 was a year of collaboration, learning, and innovation. Together, we achieved…

• 1 min read
PCB , MSA , Tcl Scripting , Cadence Community Forums , community forum , PCB design , OrCAD X , Allegro PCB Editor , allegro x , SKILL

Verification

Palladium – Power Estimation Efficiency from Days to Minutes

In the competitive semiconductor industry, leading innovators consistently set the…

• 2 min read
System Design and Verification , Palladium , SVG , dpa , Power Analysis , hsv , verification
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