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Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate
• 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか？」をテーマに、本田技術研究所社 先進技術研究所（HGRX）との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
• less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
• 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI
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Blog - Post List

Latest blogs

RF Engineering

μWaveRiders: Cadence AWR Design Environment Graph Measurements Tips and Tricks

The eighth in the series of AWR Design Environment Tips and Tricks, this blog highlights…

• 6 min read
RF Simulation , Circuit simulation , AWR Design Environment , Graphing measurements , awr , Graphs , Tips/Tricks , Circuit Design , microwave office , Visual System Simulator (VSS) , measurements

System, PCB, & Package Design 

Redefining Power Integrity and Thermal Analysis

Learn from Brad Griffin, Product Management Group Director at Cadence Design Systems…

• less than a min read
Power Integrity , System-Level Design , Signal Integrity , Thermal Analysis

Breakfast Bytes

Announcing Xcelium Apps

Today, we announced Xcelium Apps, a portfolio of domain-specific technologies implemented…

• 2 min read
xcelium , simulation , xcelium apps

Computational Fluid Dynamics

Meshing and CFD for Mixing Reactants in a Y-Pipe

Our partners at neptech have published a new CFD case study of modeling the flow…

• less than a min read
CFD , Computational Fluid Dynamics , fluid dynamics , Mesh Generation , mixing

Computational Fluid Dynamics

On-Demand Webinar - Discover What's New in Fidelity CFD

Watch Fidelity CFD in action during this 30-minute on-demand webinar.

• 1 min read
CFD , Pointwise , Computational Fluid Dynamics , Cadence Fidelity , fluid dynamics , Fidelity CFD , CFD Applications , simulation software , NUMECA , Mesh Generation

Breakfast Bytes

Imec Visit Part Two

This is the second post about my visit to imec last week. The first was yesterday…

• 6 min read
system-in-package , Memory , 3DIC , imec , CMOS

SoC and IP

AI in Healthcare

Artificial Intelligence and edge computing are revolutionizing the healthcare industry…

• 4 min read
artificial intelligence , featured , Edge Computing , healthcare , AI

Breakfast Bytes

My Second Visit to imec

Back in 2018, I first visited imec in Leuven, just outside Brussels in Belgium. I…

• 3 min read
imec , EUV

Breakfast Bytes

Sunday Brunch Video for 26th June 2022

https://youtu.be/upd4LIYSez0 Made at embedded world (camera Antti Lautanen) Monday…

• less than a min read
sunday brunch

Computational Fluid Dynamics

This Week in CFD - and More

Has it really been since 28 Apr when I last yammered here? That seems to be my most…

• 2 min read
CFD , Computational Fluid Dynamics , Fidelity CFD

PCB、IC封装：设计与仿真分析

IC封装中快速创建结构的新方法

本文作者：Tyler Lockman，Cadence Software Architect，于加拿大卡尔顿大学获计算机科学学士学位后，在Cadence Allegro产品部门工作超过20年…

• less than a min read
IC , Chinese blog , SiP , allegro 17.4 , Allegro Package Designer Plus , 中文 , APD Plus , IC封装 , Allegro

Breakfast Bytes

I Came to the US 40 Years Ago Today

Today, I'm going to be a bit self-indulgent. It is the 40th anniversary of when I…

• 6 min read
credit , anniversary

カスタムIC／ミックスシグナル

Virtuosity: 信頼性解析レポート－信頼性解析の結果をインタラクティブに

私たちは、製品を使いやすく、簡単にアクセスできるようにし、視覚的にも魅力的なものにすることがユーザビリティのアイデアであると考えています。 私たちは、製品のユーザビリティを向上させるために常に努力しています…

• 1 min read
SQLite , Stress Analysis , Analog Design Environment , ADE Explorer , Reliability Report , Virtuoso Analog Design Environment , Virtuoso , Spectre , Virtuosity , ISR21 , Virtuoso Video Diary , ICADVM20.1 , SQLite Operator , aging , japanese blog , ISR26 , reliability analysis , custom reliability data filter , Custom IC , IC6.1.8 , ADE Assembler

Breakfast Bytes

embedded world 2022

Every year, in early March, Embedded World takes place (or embedded world, as they…

• 3 min read
embedded world 2022 , embeddedf

PCB、IC封装：设计与仿真分析

利用 HEMT 和 PHEMT 改善无线通信电路中的增益、速度和噪声

本文要点 高电子迁移率晶体管 (High electron mobility transistors ，HEMT) 和伪高电子迁移率晶体管 (pseudomorphic…

• less than a min read
射频 , RF , 微波 , Chinese blog , 毫米波 , awr , 无线通信 , 中文 , 通信 , 智能系统设计

Breakfast Bytes

CadenceLIVE: Intel Foundry Services

One of the potentially significant events in the foundry marketplace is the creation…

• 5 min read
Intel , cadencelive 2022 , cadence live silicon valley , cadencelive , ifs , intel foundry services

Verification

5X “Time Warp” in Your Next Verification Cycle Using Xcelium Machine Learning

Artificial intelligence (AI) is everywhere. Machine learning (ML) and its associated…

• 1 min read
xcelium ml , machine learning , xcelium , simulation

Analog/Custom Design

Virtuoso Meets Maxwell: Getting Your Existing SiP File Into Virtuoso RF Solution

I have been involved in the Virtuoso RF Solution for the last four years. Most of…

• 6 min read
SiP , Enablement GUI , Virtuoso Meets Maxwell , Virtuoso RF Solution , Virtuoso RF , Allegro Package Designer Plus , Assisted Export , System Design Environment , RF design , SiP Layout Option , Custom IC Design , Assisted Flows , Assisted Import , Allegro

Breakfast Bytes

W. Edwards Deming: A Prophet Ignored in His Own Land

Thirty years ago last Friday, 17th June 1992, I went to Seattle to attend a two-day…

• 7 min read
quality , deming prize , edwards deming , deming
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