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Corporate News

Cadence’s Agentic AI Design Vision Takes Center Stage at DAC

AI infrastructure demands are changing what semiconductor design must solve. The…

Corporate
• 4 min read
AuraStack AI Super Agent , featured , agentic ai , DAC 2026 , ChipStack AI Super Agent

Corporate News

AI Infrastructure Starts Beyond the Chip

Why Advanced Packaging and PCB Design Have Become the Next Frontier of Innovation…

Corporate
• 8 min read
chip , featured , AI infrastructure , agentic ai , packaging

Digital Design

Cadence RTL Design Studio: Built for the Full PPAC Journey

If you've used Joules RTL Design Studio, you already know what it can do. Now it…

raquelp
• 2 min read
Digital Design and Signoff , featured , Joules , Digital Implementation , rtlstudio

Corporate News

How the New ASK AI Assistant Makes Support More Seamless

Finding the right answer often takes more than one question. Users may start with…

Corporate
• 2 min read
featured , customer support , Generative AI , ASK Portal , ASK AI Assitant
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Blog - Post List
Latest blogs

Corporate News

The Stage Is Set: Design for AI, AI for Design at CadenceLIVE Silicon Valley

Something is shifting in the world of silicon design, and you can feel it even before…

• 4 min read
CadenceAI , featured , CadenceLIVE2026 , cadencelive silicon valley , Intelligent Systems , AI in chip design , Semiconductor Innovation , Electronic Design Automation , AIinEngineering , AI for design , System-Level Design , Semiconductor , design for AI , ChipDesign

Cloud

Accelerating Semiconductor Innovation at Cloud Scale

How Cadence Managed Cloud Services on AWS enable faster, scalable, more secure design…

• 3 min read
featured , Cadence Cloud Managed Services , aws , cadence cloud

Verification

C-PHYv3.0 Verification, 35% Throughput Boost for Camera and Display Designs

With the evolution of advanced camera systems and higher-resolution displays for…

• 4 min read
Verification IP , PHY Layer , CPHYv3.0 , 18 Wire state Mode , Camera and Display Interface Design , MIPI-CPHY

Cadence Japan

電子回路とフォトニック回路シミュレーションの統合

フォトニクスの重要性人工知能（AI）の急速な普及や高速モバイルネットワークの展開を背景に、データストレージ需要は大きく拡大しており、大量のデータを処理・転送する能力がこれまで以上に求められています…

• less than a min read
news story , featured , Spectre Photonics , Spectre , japanese blog

Data Center

Industry’s First UALink-200G Controller and PHY Running in 3nm!

AI systems are running into a familiar problem. Compute keeps scaling, but the infrastructure…

• 3 min read
AI data center , data center , hyperscale data center , AI factory

Analog/Custom Design

Quantus Assistant: Your AI Copilot for RC Extraction

An AI-powered copilot for Quantus that answers RC extraction questions in plain language…

• 5 min read
Cadence Quantus Copilot , Quantus Extraction Solution , qrc , Quantus , Custom IC Design , Assisted Flows , Virtuoso Layout Suite

Data Center

Scale Up vs. Scale Out in Modern AI Factories

Choosing pod fabrics, planning bisection bandwidth, and managing ordering semantics…

• 7 min read
GPU data center , data center , hyperscale data center , Data Center architecture

中文技术专区

CES 2026 回顾：基于真实可用的 eUSB2V2 系统演示 筑牢信任基石

没有什么比一套真实可用的系统更能建立信任。 这正是我们在拉斯维加斯 CES 2026 展会上展示的核心理念 —— 我们成功演示了业内首创的 3nm eUSB2V2…

• 1 min read
Design IP , IP , CES , USB , USB 2.0 , semiconductor IP , AI

Computational Fluid Dynamics

Setting New Windsurfing Record Speeds Above 100 KPH With Fidelity CFD

The Zephir Project, a high-performance research program led with ALTEN, was initiated…

• 4 min read
FINE Marine , featured , Fidelity CFD , Windsurfing , Zephir Project , Hydrodynamics , ALTEN

SoC and IP

SOCAMM: Modernizing Data Center Memory with LPDDR6/5X

Small Outline Compression-Attached Memory Module (SOCAMM) has made its way into the…

• 3 min read
Design IP , AI Inferencing , AI Factories , ip cores , lpddr5x , AI training , Lpddr6

Cadence Japan

東レの3Dプリンタ用樹脂粉末データを「Digimat」材料データベースに追加

3Dプリンタ造形における軽量化と高強度を両立する設計を支援 エムエスシーソフトウェア株式会社 (本社：東京都千代田区、代表取締役社長:今野ソックス真生、ケイデンスグループ…

• less than a min read
news story , featured , MSC Software , Digimat , japanese blog

Corporate News

CadenceLIVE Silicon Valley 2026: Powering AI, Transforming Design

Discover the future of electronics and system design at CadenceLIVE Silicon Valley…

• 3 min read
featured , NVIDIA , AI for design , broadcom , cadencelive , design for AI

Verification

EUSB2 V2 Explained: Multi Gigabit Symmetric and Asymmetric Operation

eUSB2‑V2 is stepping into the spotlight at a time when hardware designers are being…

• 4 min read
Verification IP , eUSB2v2 , eUSB , verification

Cadence Japan

Cadenceが「Where You Work Matters」でプラチナ認定雇用主に選出

Cadenceは、2026年の「Where You Work Matters」リストでプラチナ認定雇用主に選出されました。本評価は、質の高い仕事を創出や従業員の成長機会を広げる取り組みが高く評価されたものです…

• less than a min read
news story , featured , japanese blog

Digital Design

Training Webinar Series: Boost Design Productivity with Cadence Digital Tools

Stay tuned to this webinar series that helps designers explore Cadence’s latest Digital…

• 3 min read
DFT , Innovus Implementation System , RTL-to-GDSII , IEEE 1500 , PPA , Digital Implementation , Genus Synthesis Solution , TAT , RTL2GDSII , Synthesis , Tempus Timing Signoff Solution , QoR , RTL Design Studio

Physical Systems Simulation (CAE)

BETA CAE 2025.1HF2 Software Release Available

Cadence BETA CAE released its 2nd Hot Fix of 2025.1 for ANSA, EPILYSIS, META, FATIQ…

• 5 min read
Automotive , Beta CAE

Digital Design

Stop Chasing IR Drop at Signoff: See It Early, Fix It Once

Early Rail Analysis (ERA) is a shift‑left power integrity methodology that exposes…

• 2 min read
digital badge , Training and Support , Early Rail Analysis , rail analysis , Voltus IC Power Integrity Solution , Innovus Implementation System , Digital Implementation , silicon signoff , IR drop

Digital Design

Can AI + EDA Really Fix IR Drop? Inside the Voltus InsightAI Training Course

This blog provides an in-depth look at Voltus InsightAI, Cadence’s generative AI…

• 3 min read
Training and Support , Innovus Implementation System , badge , Power Integrity , Voltus InsightAI , Digital Implementation , IR drop

Cadence Japan

株式会社ベリフォアが日本ケイデンス・デザイン・システムズ社に統合されました

このたび、2026年4月1日付で株式会社ベリフォアは、日本ケイデンス・デザイン・システムズ社へ正式に統合されました。 ベリフォアは、半導体設計の検証分野で高い技術力を持ち…

• less than a min read
japanese blog
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