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Featured

Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
Corporate 2 Jun 2026 • 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
Corporate 31 May 2026 • 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
Corporate 21 May 2026 • 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
Corporate 20 May 2026 • 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
cdns - all_blogs_categories

  • All 6375
  • Corporate News 259
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  • Artificial Intelligence 26
  • Cloud 23
  • Computational Fluid Dynamics 372
  • Data Center 57
  • Digital Design 458
  • Learning and Support 62
  • RF Engineering 116
  • SoC and IP 435
  • System, PCB, & Package Design  1015
  • Verification 1321
  • Cadence Japan 17
  • Physical Systems Simulation 5

  • CFD(数値流体力学) 45
  • 中文技术专区 9
  • カスタムIC/ミックスシグナル 199
  • PCB、IC封装:设计与仿真分析 136
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  • RF /マイクロ波設計 45
  • Spotlight Taiwan 64
  • The India Circuit 93
  • 定制IC芯片设计 79
  • データセンター 7

  • Whiteboard Wednesdays 253
Blog - Post List
Latest blogs

Digital Design

Multitasking with the Innovus Mixed Placer

Why Software Multitasking Is Brilliant—And Why You Shouldn't Text While Driving …

VNelson 8 Oct 2025 • 2 min read
EDI , training bytes , Digital Implementation , Innovus

Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

Corporate 8 Oct 2025 • 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC , OIP Award

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか?」をテーマに、本田技術研究所社 先進技術研究所(HGRX)との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan 8 Oct 2025 • less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog , AI

Computational Fluid Dynamics

Automate Results Analysis in Fidelity with Python-Based Recording

Key Points Enhanced Reproducibility: Scripting captures the complete post-processing…

Gaurav 8 Oct 2025 • 1 min read
Python , Cadence Fidelity , Python API , Fidelity CFD

Digital Design

AI’m Always With You While Working

Artificial intelligence (AI) is not only just a buzzword today; it also helps us…

P Saisrinivas 7 Oct 2025 • 3 min read
ECO , conformal , Static timing analysis , DFT , online courses , Innovus Implementation System , Gate level simualtion , LEC , STA , Cadence Webinar , Cadence Online Support , Floorplanning , RTL-to-GDSII , verisium , Xcelium Logic Simulator , training , Logic Design , coverage analysis , RTL-to-GDSII FrontEnd , training bytes , RTL-to-GDSII BackEnd , Digital Implementation , implementation , Genus Synthesis Solution , ATPG , Synthesis , RTL Code , signoff , Placement , RTL design , Tempus Timing Signoff Solution , IR drop , vManager , Modus ATPG

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G 7 Oct 2025 • 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink , ECOC , Ultra Ethernet

SoC and IP

Accelerate Automotive System Design with Cadence AI-Driven DSPs

The automotive industry is on the brink of a transformative era powered by intelligence…

Vinod Khera 6 Oct 2025 • 6 min read
Automotive , infotainment , autonomy , In-cabin sensing , lidar , Xtensa CPU , radar , Tensilica , vision , ADAS

Data Center

Join Us for Data Center Technologies at CadenceCONNECT Middle East 2025

The future of data center innovation is converging in Abu Dhabi! Following the success…

Veena Parthan 5 Oct 2025 • 2 min read
data center , digital twin , cadenceconnect

Analog/Custom Design

Virtuoso Studio Refreshed for Modern Outlook

Our new AI-powered custom design solution, Virtuoso Studio, leverages our 30 years…

GirishV 3 Oct 2025 • 5 min read
Virtuoso , Custom IC Design

Corporate News

Danfoss Amplifies PCB Design with Cadence Allegro X AI

Danfoss is a Danish family-owned multinational company with a focus on sustainability…

Tanushri Shah 3 Oct 2025 • 1 min read
designed with cadence

Computational Fluid Dynamics

Join the CFD Track at CadenceCONNECT Middle East 2025

Join us for a deep dive into the future of computational fluid dynamics (CFD). Following…

Veena Parthan 3 Oct 2025 • 2 min read
CFD , cadenceconnect , Aerospace and Defense

SoC and IP

A Hybrid Subsystem Architecture to Elevate Edge AI

The world of artificial intelligence is moving beyond the cloud and into our everyday…

SriramK 2 Oct 2025 • 4 min read
controller IP , DSP , cadence , NeuroEdge 130 , IoT , Tensilica DSPs , SoC , ip cores , Tensilica , semiconductor IP , AICP

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate 2 Oct 2025 • 7 min read
featured , data center , AI Infra Summit 2025 , digital twin , AI for design , Cadence Reality Digital Twin Platform , design for AI , post event insights

SoC and IP

From 12 Hours to 2: How AI Accelerates Automotive Quality Assurance

In the fast-paced world of Industry 4.0, quality assurance (QA) is no longer just…

Anika Sunda 1 Oct 2025 • 2 min read
Automotive , Regression , Verisium Manager

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate 1 Oct 2025 • 4 min read
news story , Edge AI , featured , Ambarella

SoC and IP

Ensuring End-to-End Traceability for Safety-Critical Applications

There is now a direct interface between the Midas Safety Platform and popular requirements…

Robert 30 Sep 2025 • 4 min read
Requirement Management System , Safety Solution , DOORS , functional safety , RMS , Safety , Product Lifecycle Management , Safety Analysis , JIRA , Traceability , Jama , Polarion , PLM , Codebeamer , Safety Compliance

Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

Vinod Khera 28 Sep 2025 • 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Verification

Evolution of AMBA AXI Protocol: An Introduction to the Issue L Update

To gain a comprehensive understanding of AMBA® AXI Issue L (AXI-L) protocol update…

Sandip Sadadiya 26 Sep 2025 • 3 min read
AXI , Verification IP

Verification

An Introduction to AMBA CHI Chip-to-Chip (C2C) Protocol

As chip designs grow larger and more complex, they become increasingly difficult…

DimitryP 26 Sep 2025 • 2 min read
C2C , multi-die , chip-chip , AMBA , CHI VIP , verification
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