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Cadence Japan

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan
• less than a min read
news story , featured , Cadence Culture , japanese blog

Corporate News

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate
• 1 min read
news story , featured , Cadence Culture

Cadence Japan

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan
• less than a min read
news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Analog/Custom Design

Virtuoso Studio: Collaborate with the Right Intentions!

By Girish Vaidyanathan, Sr. Product Marketing Manager, Cadence Design Systems. The…

• 4 min read
collaboration , Virtuoso Studio , AMS Designer , Virtuoso , Layout design

Computational Fluid Dynamics

Women in CFD with Colinda Francke

We are excited to feature Colinda Francke, Senior Product Engineering Manager for…

• 7 min read
FidelityCFD , WomenAtCadence , women in engineering , engineering , simulation software , NUMECA , Women in CFD

Verification

Best Practices to Achieve the Highest Performance Using Cadence Xcelium Logic Simulator…

In a landscape characterized by increasingly intricate designs and rapidly diminishing…

• 5 min read
Xcelium Logic Simulator , Multi-Core , best practices , verification

Digital Design

Joules RTL Design Studio: Accelerating Fully Optimized RTL

Cadence announced Joules RTL Design Studio today at CadenceLIVE Japan 2023, a new…

• 2 min read
digital design , RTL diff , featured , RTL synthesis , RTL restructuring , PPAC , Digital Implementation , lint checker , RTL design , RTL debugging , RTL analysis , Joules RTL Design Studio

Digital Design

Recording Now Available: Intro to Genus iSpatial Synthesis Flow Webinar

With advanced-process nodes, a standard cell's physical delay, net delay, and congestion…

• 1 min read
Genus , featured , Floorplanning , training , webinar , ispatial , Placement , Cadence Support Portal , physical implementation , cadence learning and support

Life at Cadence

DEI@Cadence: Do You Know the Dragon Boat Festival?

Diversity, equity, and inclusion (DEI) are not just words but values that are exemplified…

• 3 min read
Cadence Culture , Women at Cadence , LifeAtCadence , AAPI , DEIatCadence

SoC and IP

How Do Robots Navigate?

Have you ever been amazed by the graceful movement of robots and self-driving vehicles…

• 4 min read
ip cores , Tensilica , VSLAM

カスタムIC／ミックスシグナル

SPECTRE 23.1 がリリースされました

SPECTRE 23.1 リリースは、 Cadence Downloads からダウンロードできます。サポートされているプラットフォームおよびその他のリリースの互換性情報については…

• less than a min read
Spectre 23.1 , fault analysis , Spectre Circuit Simulator , spectre fx , Spectre Fast Monte Carlo , japanese blog , Spectre X distributed simulation , Legato Reliability , Spectre X Simulator

Analog/Custom Design

Virtuoso Studio IC23.1 Now Available

Virtuoso Studio IC23.1 production releases are now available for download.

• 12 min read
featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement , IC Release Blog , Custom IC Design , Cadence Community , IC23.1

Corporate News

Recogni Is Making AI-Based Vision Inference Chips

Recogni is an AI chip start-up incorporated in 2017 for the automotive market. Like…

• 1 min read
Cloud Passport , cloud , designed with cadence , cadence cloud

System, PCB, & Package Design 

System Analysis Knowledge Bytes: A Step-by-Step Guide to Shorting Nets in Sigrity…

The System Analysis Knowledge Bytes blog series explores the capabilities and potential…

• 7 min read
Cadence Online Support , RAK , Celsius PowerDC , PowerSI

System, PCB, & Package Design 

BoardSurfers: Training Insights: Improve Debugging Efficiency Using Procedures In…

Debugging a PCB from a bare schematic and board is a time-consuming task. Using the…

• 3 min read
Cadence Online Support , RAK , inspectar , PCB design , Allegro PCB Editor , Allegro

Computational Fluid Dynamics

Exploring an Intake Manifold Operating Space in the Fidelity CFD Platform

In the Fidelity CFD platform, multiple design options can be created to accomplish…

• 2 min read
CFD , Engine Intake Manifold , operating conditions , valves , Fidelity CFD , engineering , simulation software

Verification

Accelerate Design Debugging Using Verisium Debug

Verisium Debug is an advanced debugging tool that helps engineers explore, analyze…

• 1 min read
Verification IP , Verisium Debug , verification

Analog/Custom Design

Knowledge Booster Training Bytes — Virtuoso CLE Webinar Recording Available

Virtuoso®︎ Concurrent Layout (CLE) is a layout editing environment that enables designers…

• 3 min read
concurrent layout editing , Virtuoso CLE , Virtuoso Layout EXL , digital badges , training bytes , Custom IC Design , online training , Virtuoso Layout Suite XL

Computational Fluid Dynamics

Accelerating Fidelity CFD on AMD EPYC CPUs with AMD 3D V-Cache Technology

Computational fluid dynamics (CFD) applications are memory bandwidth-hungry, and…

• 3 min read
Computational Fluid Dynamics , Fidelity CFD

Computational Fluid Dynamics

CadenceCONNECT CFD Is Coming to Europe

Join us this fall in Munich, Germany, on October 10-11, 2023, as we gather for CadenceCONNECT…

• 1 min read
CFD , Computational Fluid Dynamics , fluid dynamics , Fidelity CFD , CFD Applications , Mesh Generation , Cadence CFD , Meshing , CadenceCONNECT CFD

SoC and IP

Cadence Perspective: 224G SerDes Trend and Solution

As an industry early mover to support the emerging 800G/1.6T networks, Cadence taped…

• 4 min read
LLM

カスタムIC／ミックスシグナル

Virtuosity: Voltus-XFi Result Browserを使用したプロのようなデバッグ: 効率を高める戦略

Cadence Voltus-XFi Customer Power Integrity Solutionに関するブログ・シリーズの第2部へようこそ。前回の記事では…

• less than a min read
Voltus-XFi , EMIR Analysis , Virtuoso Studio , Virtuoso , Virtuosity , japanese blog , Custom IC Design , debugging
CDNS - Fix Layout Hompage