Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Corporate News

CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela Samuel
• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Computational Fluid Dynamics

Highlights Of The Automotive Aerodynamics And Thermal Management Conference

Where are we heading in Aerodynamics and Thermal Management for Automotive design…

• 2 min read
Automotive , automotive engineering , Computational Fluid Dynamics , fluid dynamics , optimization , CFD Applications , simulation software , simulation

Digital Design

Voltus Voice: Playback 2021 - Power Integrity Blogs At a Glance

A recap of the power integrity posts in the Voltus Voice blog series through 2021…

• 3 min read
Silicon Signoff and Verification , Voltus IC Power Integrity Solution , electrostatic discharge , resistance analysis , hierarchical power integrity analysis , Digital Implementation , rush current analysis

Breakfast Bytes

December Update: NVIDIA/Arm, Space, Geography, and More

It's the last Friday of the month so time for the December update. But actually,…

• 4 min read
NVIDIA , geography , update , ARM , james webb telescope

System, PCB, & Package Design 

System Analysis Knowledge Bytes: A Quick Overview of Task Assistant in Clarity 3D…

This blog discusses the implementation of task assistant for the Set Up Computer…

• 3 min read
Sigrity and Systems Analysis , Task Assistant , Clarity 3D Solver , Clarity 3D Workbench

Breakfast Bytes

CES 2022: Cadence Will Be there In-Person with Lots of Tensilica Applications

UPDATE: This post is out of date since Cadence will not be attending CES in person…

• 3 min read
Consumer Electronics , CES , audio , HiFi , radar , Tensilica , vision , ADAS

System, PCB, & Package Design 

BoardSurfers: Training Insights: Creating and Managing Copper Shapes in Allegro PCB…

In multilayer PCB designs, copper areas have many uses and are critical to the performance…

• 6 min read
17.4 , BoardSurfers , PCB Editor , 17.4-2019 , Training Insights , Allegro PCB Editor , Shape Checks , Allegro

Breakfast Bytes

Log4J: 2021 Ends the Same Way It Began

2021 opened with the discovery of the Solar Winds breach, which I wrote about on…

• 4 min read
security , etay maor , cato networks , log4j , nist

Breakfast Bytes

What Is an LFP Battery? A 4680?

On September 9th, Tesla held a "Battery Day." Elon Musk also gave an update on the…

• 9 min read
Automotive , electric vehicles , tesla , battery , evs

Analog/Custom Design

Virtuoso Video Diary: Do More With eyeHeightAtXY and eyeWidthAtXY Calculator Functions…

Read through this blog to know more about the enhancements made to the eyeHeightAtXY…

• 3 min read
ISR22 , eyeWidthAtXY , Cadence blogs , ICADVM18.1 , cadence , special functions , digital communication , pam4 , Virtuoso Visualization and Analysis XL , Virtuoso Analog Design Environment , Virtuoso , eye diagram , ViVA , NRZ , Virtuoso Video Diary , ICADVM20.1 , eye height , usability , eye width , Custom IC Design , calculator , eyeHeightAtXY , IC6.1.8

Analog/Custom Design

Spectre Tech Tips: Identifying and Resolving Spectre Accuracy Issues Caused by Multiple…

A significant number of accuracy issues in Spectre simulations are caused by the…

• 6 min read
spectre aps , DC Solution , Analog Simulation , simulatiom , Spectre , Spectre X Simulator

カスタムIC／ミックスシグナル

Virtuoso Video Diary: Virtuoso Visualization and Analysis XLが進化してグラフサマリラベルのユーザビリ…

私たちは、製品を使いやすく、簡単にアクセスできるようにし、視覚的にも魅力的なものにすることがユーザビリティのアイデアであると考えています。私たちは、製品のユーザビリティを向上させるために常に努力しています…

• less than a min read
Analog Design Environment , direct measurements , Cadence blogs , cadence , histograms , Virtuoso Visualization and Analysis XL , Virtuoso Analog Design Environment , Virtuoso , Virtuoso Video Diary , usability , japanese blog , Custom IC Design

Computational Fluid Dynamics

The Y+ Calculator App for iOS and Android

The Y+ Calculator app is a handy and free tool for calculating the grid spacing to…

• less than a min read
CFD , boundary layer , Y+ , Meshing

Digital Design

Pegasus: Get your Wings: Pegasus Results Viewer- LVS

In our previous blog we introduced Pegasus Results Viewer (Pegasus RV) and gave detailed…

• 4 min read
Pegasus Verification System , Physical verification , Pegasus RV , ERC , Pegasus Results Viewer , Extraction , pegasus , LVS , SCD , ISL , signoff , Pegasus LVS RV

Breakfast Bytes

Anirudh Recognized with the 2021 Phil Kaufman Award

This morning, the ESD Alliance of SEMI and IEEE CEDA announced that our new CEO,…

• 5 min read
Kaufman Award , CEDA , ieee ceda , Anirudh Devgan , Phil Kaufman , esd alliance

Computational Fluid Dynamics

Fuel Savings Up To 5% Thanks To Ship Trim Optimization With Omnis Marine

Ship trim optimization has recently gained enormous momentum as indeed it can significantly…

• 5 min read
CFD , naval archicture , Marine Engineering , shipping , turbulence , automation , marine , fine/marine , Computational Fluid Dynamics , fluid dynamics , simulation software , NUMECA , Mesh Generation , Omnis , naval , simulation

Analog/Custom Design

Virtuoso Meets Maxwell: How to Perform an XOR Operation on a Package Design Interchanged…

While Allegro Package Designer Plus together with SiP Layout Option is and continues…

• 7 min read
XOR SiP against OA Form , SiP , Void , XOR , Physical Verification System (PVS) , Virtuoso Layout EXL , Virtuoso Meets Maxwell , Annotation Browser , Virtuoso RF Solution , Virtuoso RF , Layers Assistant , oa , SiP Layout Option , ICADVM20.1 , layers , PVS , connectivity

Spotlight Taiwan

Cadence攜手智聯服務 耶誕傳愛捐贈綠光種子教室二手電腦 支持弱勢學童數位學習教育

在2021年溫馨的年終聖誕佳節之際，Cadence益華電腦攜手宏碁集團旗下的智聯服務(Acer Synergy Tech)，共同助力弱勢學童教育，捐贈近五十台二手電腦予新竹縣愛鄰社區關懷協會綠光種子教室…

• less than a min read
cadencecare , taiwanese blog

RF /マイクロ波設計

μWaveRiders:Cadence AWR Design Environmentのカスタマイズ

Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題はCadence AWR Design…

• 1 min read
RF Simulation , Circuit simulation , AWR Design Environment , awr , AWR customization , Tips/Tricks , RF design , microwave office , japanese blog , Visual System Simulator(VSS)

RF Engineering

μWaveRiders: Cadence AWR Design Environment Customization

The third in the series of AWR Design Environment Tips and Tricks, this blog highlights…

• 7 min read
RF Simulation , Circuit simulation , AWR Design Environment , awr , AWR customization , Tips/Tricks , RF design , microwave office , Visual System Simulator (VSS)
CDNS - Fix Layout Hompage