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CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela Samuel
• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Breakfast Bytes

Open RAN Phase 2

I first wrote about Open RAN in my post Fourth 4G Network Goes Live in Japan . Open…

• 4 min read
oran , mobile , o-ran alliance , openran

Verification

Renesas Leverages Palladium + System VIP Solution for System Verification and Performance…

Verifying bus performance by analyzing bandwidth and latency over time in chips is…

• 5 min read

Digital Design

Power Is HOT and Touches Everything and Everybody! But the Challenge Is To Deal With…

Low-Power synthesis is one of the important stages in the full IC flow. Here, you…

• less than a min read
Low Power , Genus , Digital Implementation , Synthesis , power optimization

PCB、IC封装：设计与仿真分析

Clarity 3D Solver 2022版本闪亮登场

最新的电磁设计同步分析功能有助于提高 IC、IC 封装和高性能 PCB 设计的速度 美国加州圣何塞(DesignCon)—楷登电子（Cadence Design…

• less than a min read
网格划分 , Chinese blog , ml , 机器学习 , EM分析 , PCB设计 , 电磁分析 , 设计同步分析 , EM , Clarity 3D Solver , 人工智能 , 刚柔结合 , AI , clarity

Breakfast Bytes

TechInsights: Foundation for the Future

The second day of the Linley Spring Processor Conference opened with a keynote by…

• 3 min read
linley processor conference , Linley , reverse engineering , techinsights

PCB設計／ICパッケージ設計

ASCENT: デザインのコンストレイントを簡単な方法で設定する

コンストレイント(制約条件)は、PCB デザインの要件が論理的、物理的の両方の観点で満たされることを保証するためのルールです。コンストレイントは、パーツ、ピン、ネットなどの様々なオブジェクトに定義できます…

• less than a min read
System Capture , 17.4 , 17.4-2019 , Allegro System Capture , japanese blog , ASCENT , Allegro

PCB、IC封装：设计与仿真分析

汽车行业合规与功能安全指南：ISO 26262 标准出台十周年

本文翻译自Cadence “Breakfast Bytes Blogs”专栏作者Paul McLellan文章“ Happy 10th Birthday ISO…

• less than a min read
Chinese blog , 中文 , 功能安全 , 汽车 , ISO 26262

Digital Design

Are You Planning To Synthesize Your Design? Do You Want To Explore the Synthesis…

A Logic Synthesis is a process of optimizing the design's area, timing, and power…

• less than a min read
Genus , Flows , Logic Design , Optimize , Synthesis

Breakfast Bytes

Linley: Western Digital's RISC-V Strategy

Western Digital acquired SanDisk in 2016. In 2017, Martin Fink, then the CTO of Western…

• 3 min read

PCB設計／ICパッケージ設計

BoardSurfers: IPC-2581の利用によるレイヤースタックアップデータの受け渡し

設計意図やスタックアップ情報を設計の初期段階のうちに製造部門や製造委託先と共有しておけば、製品設計に影響を与え製品納入を遅らせてしまうような製造やアセンブリ関連の問題を回避することができます…

• less than a min read
PCB manufacturing , BoardSurfers , IPC-2581 Consortium , 17.4-2019 , japanese blog , Allegro PCB Editor , IPC-2581 , Allegro

Breakfast Bytes

Sunday Brunch Video for 8th May 2022

https://youtu.be/xADMKcqKLNg Made on Communication Hill with Sheep (camera Carey…

• less than a min read
sunday brunch

Digital Design

Chris, Kris, Cris, Your Name, My Name; Does How You Spell the Name Matter to Conformal…

No matter how your name is spelt in different countries, and how they say it, once…

FormerMember • 1 min read
digital badge , conformal , training bytes , online training

PCB、IC封装：设计与仿真分析

如何建立一个数据中心：全靠 SerDes和散热

本文翻译自Cadence “Breakfast Bytes Blogs”专栏作者Paul McLellan文章 “How to Build a Data Center…

• less than a min read
Chinese blog , 热分析 , celsius , 以太网 , PCIe , 中文 , 系统分析 , SerDes , 散热 , 数据中心

Digital Design

Do You Want to Explore Instances in Genus Synthesis Solution Layout GUI?

What comes to your mind when we say Genus Layout GUI (Graphical User Interface)?…

• less than a min read
Genus , gui , place and route , highlighted objects , physical implementation

Breakfast Bytes

An Interview with Morris Chang

A couple of weeks ago, Morris Chang, the founder of TSMC and, for a long time (twice…

• 4 min read
TSMC , Morris Chang

System, PCB, & Package Design 

ASCENT: Reasons to Move to 17.4-2019 HotFix SPB17.40.028 of Allegro Pulse

HotFix SPB17.40.028 of 17.4-2019 of Allegro® Pulse is out and is available for download…

• 5 min read
collaboration , data platform , Team design , QIR4 , 17.4-2019 , Allegro Pulse , Allegro System Capture , ASCENT

PCB、IC封装：设计与仿真分析

AWR：智能射频设计

本文翻译自Cadence “Breakfast Bytes Blogs”专栏作者Paul McLellan文章 “ AWR: Intelligent RF Design…

• 1 min read
射频 , 5G , RF , 微波 , Chinese blog , awr , 中文 , awr v16

Breakfast Bytes

A History of Cadence in the Cloud

Cadence Cloud started before there even was a cloud. We just didn't call it Cadence…

• 7 min read
cloud , special post , cadence cloud

Verification

Enflame Accelerates the DFT and DFD Verification using Palladium

DFT (Design for Testability) provides the much-needed support to the manufacturers…

• 5 min read
CDNS - Fix Layout Hompage