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Cadence Japan

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan
• less than a min read
news story , featured , Cadence Culture , japanese blog

Corporate News

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate
• 1 min read
news story , featured , Cadence Culture

Cadence Japan

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan
• less than a min read
news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Computational Fluid Dynamics

This Week in CFD

This week’s CFD news includes both an image of the week and an application of the…

• less than a min read
CFD , Pointwise , Computational Fluid Dynamics , fluid dynamics

Breakfast Bytes

Linley: Habana and Cerebras

In the recent Linley Spring Processor Conference, there were many processors for…

• 4 min read
linley processor conference , cerebras , Linley , aws , gaudi , AI , habana

カスタムIC／ミックスシグナル

Spectre FX: FはFastのF、本当に高速

本日5月20日(米国時間)、ケイデンスは、最大で3倍の速度（同等以上の精度で）を持つ次世代FastSPICE回路シミュレータSpectre FX Simulatorを発表しました…

• less than a min read
Circuit simulation , FastSPICE , Spectre , spectre fx , japanese blog , SPICE

Spotlight Taiwan

增強系統分析與PCB設計研發戰力 - 隨選影片 向您致敬!

PCB設計暨系統分析 - 強檔精彩影片回顧! 5G、AI、工業物聯網（IIoT）、自駕車和超大規模（hyperscale）運算等技術的匯聚，為半導體產業帶來了新商機…

• less than a min read
PCB , Chinese blog , celsius , Sigrity X , taiwanese blog , Allegro , clarity

Breakfast Bytes

Spectre FX: F Is for Fast, Really Fast

Today, Cadence announced the Spectre FX Simulator, a next-generation FastSPICE circuit…

• 5 min read
Circuit simulation , FastSPICE , Spectre , spectre fx , SPICE

Life at Cadence

Moore’s Law Is Still Accelerating

Moore’s Law Is Still Accelerating. I’m looking at Moore’s Law differently, measuring…

• 4 min read
process , Advanced Node , implementation , moore's law

Breakfast Bytes

RSAC: Opening Keynote and a Whitrospective

The RSA Conference on cybersecurity took place in the middle of May. This year, the…

• 5 min read
rsac 2021 , diffie , rsa conference , rsa , rsac

中文技术专区

视频演示：PCIe 5.0设计究竟应该怎么做

原文链接： https://community.cadence.com/cadence_blogs_8/b/ip/posts/taking-the-wraps-off…

FormerMember • less than a min read
controller IP , CXL , PCI Express 5.0 , Design IP , IP , PHY , Gen5 , PCIe , SerDes , Compute Express Link

Spotlight Taiwan

淺談運算流體力學(CFD)與Pointwise公司

原文出處: Please Excuse the Mesh: CFD and Pointwise 作者: Paul McLellan Cadence於今年四月收購了流體動力學公司Pointwise…

• less than a min read
CFD , Pointwise , taiwanese blog

System, PCB, & Package Design 

ASCENT: Analyzing Electrical Stress, Aging, and Faults of PCB Components

Component heating, Joule heating, heat sinks…does the very idea of checking the stress…

• 2 min read
System Capture , Cadence Design Systems , 17.4 , system reliability , logical design , design integrity , logic capture , 17.4-2019 , PCB design , device reliability , Allegro System Capture , Derating , ASCENT , electrical stress analysis , Schematic , Allegro

Verification

How to Verify LPDDR5 from IP to System Level?

LPDDR5 DRAM aims to serve a wide array of markets, including automotive, client PCs…

• 3 min read
Verification IP , SoC verification , Specman , Memory , Functional Verification , VIP , JEDEC , Memory Model Portfolio , storage , lpddr5 , lpddr5x

Breakfast Bytes

Vietnamese Orphanages and Smartphone Apps

Kids in orphanages have a hard life. You only have to read Oliver Twist to get some…

• 6 min read
technovation , team4tech , kidspire vietnam

Analog/Custom Design

Virtuoso Meets Maxwell: Making the Ports Ready for Simulations in Clarity 3D Sol…

This blog describes the features in Virtuoso Layout EXL and Clarity 3D Solver that…

• 6 min read
Virtuoso Meets Maxwell , Virtuoso RF Solution , Virtuoso RF , Electromagnetic analysis , ICADVM20.1 , Clarity 3D Solver , Custom IC Design , Virtuoso Layout Suite EXL

カスタムIC／ミックスシグナル

Start Your Engines: 非常に効率的なミックスシグナル検証エンジニアの7つの習慣

Cadence® Spectre® AMS Designer は、高いパフォーマンスのミックスシグナル・シミュレーション・システムです。複数エンジンの使用や、さまざまなプラットフォームから実行できる機能により…

• 1 min read
AMS-Designer , mixed-signal methodology , Start Your Engines , Virtuoso , mixed signal , japanese blog , AMS Verification , mixed-signal verification

Academic Network

UCLA Leverages High-level Synthesis to Make Rapid Architecture Trade-offs

The Cadence Academic Network values our deep relationships and collaborations with…

• 1 min read
Cadence Academic Network , Berkeley , Spectre , Academic Partnerships , Stratus , UCLA

Computational Fluid Dynamics

The Evolution of Computational Aerospace and CFD

In the beginning there was the airfoil. Or more specifically, in 1968 it became clear…

• 8 min read
CFD , Aerospace , FLO22 , Pointwise , Computational Fluid Dynamics , fluid dynamics , CFD Applications , NUMECA , Mesh Generation

Computational Fluid Dynamics

Extending Quadcopter Drone Flight Time and Range with OMNIS CFD Simulations

Drones have proven to be an efficient solution for a large range of applications…

• less than a min read
CFD , Computational Fluid Dynamics

定制IC芯片设计

Virtuoso Meets Maxwell: 跨平台流程的模式-- 统一库

目前，将使用不同工艺的元件集成在一起似乎是一件神奇的事情，但是它允许设计人员使用新的工艺，在衬底上将验证过的旧节点设计组合在一起，从而降低了同质片上系统(SOC…

• less than a min read
Technology Independent Layout Pcell , ICADVM18.1 , Unified Library , Virtuoso Layout EXL , Virtuoso System Design Environment , Virtuoso RF Solution , Cadence SiP Layout , TILP , Chinese blogs , VMM

Breakfast Bytes

Update: CadenceLIVE India, Ransomware, 2nm, and More

This is another one of my update posts, following up on topics I covered in earlier…

• 8 min read
security , ransomware , solar storm , ibm 2nm , IBM , Mars , cadencelive india , ARM , 2nm
CDNS - Fix Layout Hompage