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Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
• 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
• 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
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Blog - Post List
Latest blogs

Breakfast Bytes

16Gbps SerDes Multiprotocol Multilink PHY IP

In any advanced node, one of the most important pieces of IP is a high-performance…

• 4 min read
USB 3.0 , pcie4 , 10G-KR , USB , pcie3 , pcie2 , PCIe , 16 Gbps , SerDes , USB 3.1 , SATA , sata3 , Breakfast Bytes

System, PCB, & Package Design 

Customize the Organization of Bond Wires in Your Artwork Films with SiP Layout and…

When it comes to IC Package substrates, Gerber is still one of the most common, most…

• 4 min read
SiP , Allegro package design , Digital SiP design , IC package design , APD , package design , manufacturing , wirebonding , substrate design tools

Breakfast Bytes

Mobile Unleashed: a New Book About ARM

Mobile Unleashed is subtitled The Origin and Evolution of ARM Processors in Our Devices…

• 3 min read
mobile unleashed , mobile , ARM , arm history , Breakfast Bytes

Breakfast Bytes

What Happens in Vegas...May Be in Your Next Chip

Cadence was at CES last week showing the most recent additions to their vision, audio…

• 2 min read
USB Type-C , Consumer Electronics Show , CES , CES 2016 , Tensilica , HiFi DSP , audio weaver , ARM , Breakfast Bytes

Whiteboard Wednesdays

Whiteboard Wednesdays—SSD Controller Basics and Trends

In this week's Whiteboard Wednesdays video, Neil Robinson talks about SSD controllers…

• less than a min read
Whiteboard Wednesdays , IP , Neil Robinson , Tensilica , SSD controllers

Breakfast Bytes

Cars, Drones, 8K, and VR/AR—Consumer Electronics Show 2016

CES is held in January each year. It is the largest conference in Las Vegas, which…

• 6 min read
USB Type-C , Consumer Electronics Show , CES 2016 , las vegas , virtual reality , drones , Tensilica IP , autonomous vehicles , augmented reality , Breakfast Bytes

SoC and IP

The Future of High-Speed SerDes

David Axelrad, product marketing manager, SerDes IP, presents Cadence's position…

• less than a min read
PCIe Gen4 , pcie4 , SerDes , gsa

Breakfast Bytes

Tempus Has Over 200 Tapeouts Within 2 Years of Rollout

One of the challenges with any new tool is to drive adoption. There really is a …

• 3 min read
PBA , Tempus , adoption , path-based analysis , tapeout

Breakfast Bytes

Samsung CES Keynote: In Sync with Real Life

Yesterday it was Samsung's turn for a keynote at CES. Depending on exactly how you…

• 4 min read
microsoft , IoT , CES 2016 , Samsung , Corning , BMW

Breakfast Bytes

Drones in the Mini-Forest: Intel's Keynote at CES

Intel's CEO, Brian Krzanich, gave the opening keynote to CES on Tuesday night in…

• 4 min read
Intel , CES , Curie , Realsense , Internet of Things , Breakfast Bytes , Brian Krzanich

SoC and IP

Chris Rowen is Now an IEEE Fellow

For he's a jolly good Fellow, for he's a jolly good Fellow... Effective January…

• less than a min read
Chris Rowen , IEEE Fellow , Tensilica

Breakfast Bytes

Moore's Law at 50: Are We Planning for Retirement?

There has been lots of speculation, especially this year with the 50th anniversary…

• 5 min read
greg yeric , moore's law , ARM , IEDM

Whiteboard Wednesdays

Whiteboard Wednesdays—The Latest on the MIPI CSI-2 2.0 Protocol

In this week's Whiteboard Wednesdays video, Moshik Ruben takes a closer look at the…

• less than a min read
Automotive , CSI-2 , Low Power , Whiteboard Wednesdays , IoT , MIPI protocols , Internet of Things , bandwidth , machine vision

System, PCB, & Package Design 

What's Good About FSP’s Enhanced Multi-Device Connections? 16.6 Has Several New …

The FPGA System Planner (FSP) 16.6-2015 release now provides support for multiple…

• 1 min read
PCB , FPGA-PCB Co-Design , FPGA System Planner , 16.6 , SPB , Grzenia , FPGA

Analog/Custom Design

Virtuosity: Things I Learned in October, November, and December 2015 by Reading Cadence…

I won't even attempt to number the items this time, and I'll have to skip the individual…

• 8 min read
EAD , Rapid Adoption Kit , ADE XL , VLS , RF design , Custom Layout , assertions , IC6.1.7 , Custom IC Design

Breakfast Bytes

Infrastructure: Connecting Mobile to the Cloud

Yesterday's blog post was about the mobile market. But, increasingly, mobile is not…

• 4 min read
computing , cloud-ran , c-ran , storage , infastructure , networking

Breakfast Bytes

I'm Goin' Mobile

"I'm goin mobile," The Who sang on one of the greatest albums of all time. Although…

• 3 min read
semiconductor IP , Internet of Things , mobile , system design enablement

SoC and IP

Word from the Source—USB-IF on USB Type-C Quality and Interoperability (Jeff Ravencraft…

In the first two parts of the interview with Jeff Ravencraft, the President and COO…

• less than a min read
USB 3.0 , cadence , Jacek Duda , USB-IF , USB , power delivery , USB 2.0 , Type-C , USB connector , USB 3.1

SoC and IP

Word from the Source—USB-IF on USB Type-C and Alternate Modes (Jeff Ravencraft Interview…

If it wasn’t for the fact that USB has always been spelled with capital letters,…

• less than a min read
USB 3.0 , Jacek Duda , USB-IF , USB , power delivery , USB 2.0 , Type-C , USB connector , USB 3.1
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