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Corporate News

Cadence Welcomes ChipStack

ChipStack, a leading startup providing agentic AI solutions for chip verification…

Corporate
• 1 min read
featured , agentic ai , Xcelium Logic Simulator , AI-Driven Verification

SoC and IP

The Power of Shifting Left: Cadence Accelerating Innovation with Arm

In semiconductor design, projects are remembered for their extremes—legendary successes…

Arif Khan
• 3 min read
ucie , xcellium , IP , featured , PHY

Corporate News

Accelerating System Design with Real-Time Simulation, Powered by AI Physics

Rising demand for AI infrastructure is driving faster innovation and smarter use…

Corporate
• 4 min read
CFD , featured , NVIDIA , accelerated compute , millennium

Analog/Custom Design

Virtuoso Studio IC25.1 ISR2 Now Available

Virtuoso Studio IC25.1 ISR2 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Digital Design

Voltus Voice: Demystifying ESD – Touch Ground with a Designer-Centric Protection…

This blog highlights the key capabilities and benefits of the Voltus ESD analysis…

• 5 min read
effective resistance , Silicon Signoff and Verification , electromigration , Voltus IC Power Integrity Solution , Power Signoff , electrostatic discharge , current density , Power Integrity , Innovus , Charged Device Model , Full-Chip , ESD

Breakfast Bytes

120th Anniversary of Hilbert's Problems

The computational software algorithms used in EDA are fundamentally mathematical…

• 3 min read
hilbert's problems , computational software , millennium prize problems

PCB、IC封装：设计与仿真分析

电子系统设计中进行片上热分析的四大挑战与应对

在大约 138 亿年前的创生之初，我们的宇宙在 0 到 10-43 (10^(-43))秒的短短时间里产生和释放了大量的热量或能量，这在理论上得到了各种模型和测量数据的支持…

• less than a min read
Celsius Thermal Solver , 热 , PI , Chinese blog , 电源完整性 , 热分析 , 3D 分析 , EE Thermal , 电热协同仿真 , 热传输 , Voltus , 中文 , 系统分析 , IC封装 , 异质封装

Breakfast Bytes

Weekend Update 2

This is my second update post where I cover things that I have covered before, and…

• 2 min read

Breakfast Bytes

Rigid-Flex

Rigid-flex sounds like something that might be a Crossfit workout-of-the-day. But…

• 5 min read
PCB , Rigid-Flex , Allegro

Breakfast Bytes

Why Attend CadenceLIVE Americas?

We renamed our user conference to CadenceLIVE (from CDNLive) just in time for it…

• 5 min read
CDNLive , cadencelive 2020 , cadencelive americas , cadencelive

PCB設計／ICパッケージ設計

BoardSurfers：17.4-2019 HotFix 007 for Electrical CAD-Mechanical CAD Library Creator…

Library Creator 17.4-2019 HotFix 007のアップデートより、Templatesダイアログ全体に改良が加えられ、テンプレートを見つけて選択しやすくなりました…

• less than a min read
Library Creator , PCB , 17.4 , PCB Editor , ECAD-MCAD Library Creator , japanese blog

PCB設計／ICパッケージ設計

2020年5月リリース、OrCAD / Allegro 17.4-2019 HotFix 007 の新機能ハイライト

OrCAD® 及び Allegro® のHotFix 007 (QIR 1)が Cadence Downloads からダウンロードできます。この新リリースでは…

• less than a min read
PCB , 17.4 , OrCAD Capture , APD , PCB Editor , japanese blog

System, PCB, & Package Design 

BoardSurfers: Installation Know-How: Six Things You Need to Know Before Installing…

Installation of software applications depends upon certain factors such as system…

• 4 min read
Allegro OrCAD Installer , OrCAD , Allegro

System, PCB, & Package Design 

IC Packagers: Removing and Replacing an Area of a Design

If you ever have the need to remove an area of your design, you may find it to be…

• 4 min read
IC Package , Allegro X Advanced Package Designer , 17.4-2019

Breakfast Bytes

Accellera Functional Safety

This is my last post about DAC 2020. During DAC Accellera had a workshop about functional…

• 8 min read
Automotive , functional safety , Accellera , fusa

Academic Network

Custom IC, Analog, and RF Design Training Deep Dive: Part 2

Let’s continue exploring the training courses related to Custom IC, Analog, and RF…

• 5 min read
Europractice , Cadence Academic Network , CMC Microsystems , Virtuoso , online training , university program

Breakfast Bytes

DAC 2020: Chips in 2030

In 2015, soon after I rejoined Cadence, I went to IEDM, the International Electron…

• 6 min read
57dac , DAC , Design Automation Conference

カスタムIC／ミックスシグナル

Virtuosity: Analog Design Environmentにおけるポストレイアウト関連の機能強化トップ３

今日のブログでは、ポストレイアウトフローの最新の機能強化について説明します。これらの機能強化により、回路図とポストレイアウトの名前のマッピング、端子電圧のプロット…

• less than a min read
ADE Explorer , post-layout , DSPF , Virtuoso Analog Design Environment , postlayout , Virtuosity , japanese blog , ADE Assembler

Analog/Custom Design

Virtuoso Meets Maxwell: How Come There is No Mention of Wirebonded ICs?

Hello and welcome to Virtuoso Meets Maxwell. If you are a regular reader you might…

• 3 min read
ICADVM18.1 , Co-Design , Virtuoso System Design Environment , Virtuoso RF , Wirebond , Electromagnetic analysis , Virtuoso , Custom IC Design , Allegro

Breakfast Bytes

Sunday Brunch Video for 2nd August 2020

www.youtube.com/watch Made in "Indonesia" (camera me) Monday: Open Source Hardware…

• less than a min read
sunday brunch

PCB、IC封装：设计与仿真分析

如何在PCB设计中解决最新的PCIe 信号完整性挑战

图 1：基于 PCIe 的高性能显卡 为了应对计算密集型工作负载，数据中心行业领域趋势正在向异构计算发展。该趋势同时推动着相应软件解决方案的开发，以便在具有不同核心和内存配置的多台计算机之间分配工作负载…

• 1 min read
Serial link analysis , SI , Chinese blog , 并行链路 , 误码率 , PCIe , 中文 , 通道仿真 , SerDes , Sigrity , Clarity 3D Solver , PCI-SIG , clarity

Life at Cadence

My Life at Cadence Video Series: Alessandra Nardi

Cadence recently interviewed five of our amazing women engineers for a new video…

• less than a min read
Insights on Culture , inclusion , Culture , STEM , cadence , my life at cadence , women

Breakfast Bytes

DAC 2020: TSMC Keynote

The opening keynote at DAC was TSMC's Chief Scientist Philip Wong. That's clearly…

• 6 min read
57dac , DAC , TSMC , Design Automation Conference
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