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CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

Reela
• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Corporate News

MSU Leveraging Intel 16 and the Cadence Tool Flow for Academic Chip Tapeout

Morgan State University (MSU) recently received an Apple Innovation Grant, designed…

Corporate
• 4 min read
news story , featured , Cadence Academic Network

Digital Design

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
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Blog - Post List

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Breakfast Bytes

September Update: Ransomware, Apple, Zero Trust, and More

It's only September 24, but this is the last Friday of the month so it's time for…

• 5 min read
Apple , rct , zero trust , designed with cadence , update , ransomeware

RF /マイクロ波設計

μWaveRiders: INTRCONNを使用したシステムレベルでのPCB配線効果のモデリング

Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題はCadence AWR Design…

• less than a min read
PCB , RF Simulation , PCB traces , AWR Design Environment , integrated circuiit , INTRCONN , RF design , japanese blog , Visual System Simulator(VSS)

RF Engineering

μWaveRiders: Modeling PCB Trace Effects at the System Level with INTRCONN

The Team RF "μWaveRiders" blog series is a showcase for Cadence AWR RF products.…

• 4 min read
PCB , RF Simulation , PCB traces , AWR Design Environment , INTRCONN , RF design , Visual System Simulator (VSS) , integrated circuit

Breakfast Bytes

Why You Should Attend CadenceLIVE Europe in October

CadenceLIVE Europe is on October 19 and will be a digital event. Let me give you…

• 4 min read
CadenceLive Europe , cadencelive

中文技术专区

μWaveRiders: Cadence AWR Design Environment V16 核心优势

AWR Design Environment V16 产品版本已上线并可从 Cadence Downloads 网页下载，其中包含以下和其它增强功能

• 1 min read
RF Simulation , Circuit simulation , AWR Design Environment , Analyst 3D FEM EM Simulator , RF design , AXIEM 3D Planar Simulator , microwave office , Visual System Simulator (VSS) , awr v16

Breakfast Bytes

Announcing Helium, Hybrid and Virtual Platforms with Multiple Gears

This morning Cadence announced the release of the Helium Virtual and Hybrid Studio…

• 4 min read
debug , virtual platform , hardware/software , helium

Verification

Verification of Integrity and Data Encryption(IDE) for PCIe Devices

The concept of Trusted Execution Environments (TEE) was developed in the early 2000s…

• 4 min read
security , funtional verification , pcie 5 , PCIExpress , encryption , PCIe , pcie gen6 , IDE

Computational Fluid Dynamics

Student Special - Get Your Omnis License and Earn A Cadence Certificate in This Free…

The Basics of CFD in 8 Weeks - Free Online Course Learn the basics of CFD in eight…

• 2 min read
CFD , Academic , workshop , Computational Fluid Dynamics , training , free license , fluid dynamics , Student , Omnis

System, PCB, & Package Design 

BoardSurfers: Detecting Potential Component Lead Assembly Issues

Placing component leads accurately as per the datasheet is an important task while…

• 4 min read
DFA , 17.4 , BoardSurfers , Lead Editor , DesignTrue DFM , 17.4-2019 , Allegro PCB Editor , DFM

Verification

Training Insights - Addressing Security Verification Requirements with JasperGold…

As a chip designer, you’re probably spending as much headspace on security threats…

• 2 min read
online , CDC , training , app , JasperGold , verification

Breakfast Bytes

At a Digital Crossroads

Politico is not usually a place I go for material for this blog, but recently it…

• 6 min read
Micron , digital divide , fcc

Computational Fluid Dynamics

This Week in CFD

As it seems to be becoming a (bad) habit, This Week in CFD is presented here as Last…

• less than a min read
CFD , Automotive , Aerospace , Pointwise , Computational Fluid Dynamics , fluid dynamics , IMO regulations , CFD Applications , adaptation , Mesh Generation

Digital Design

Do you want to Flaunt your Expertise? Grab the Digital Badge Today!

When you achieve the credit for proficiency, do you want to show it to the world…

• 1 min read
Genus , exam , badge , Joules , Synthesis

Breakfast Bytes

Ten Lessons from Three Generations of Google TPUs

In my post about the big trends from this year's HOT CHIPS, I mentioned a paper from…

• 7 min read
tpu , data center , google

The India Circuit

Mentor Story: Raj Gutta - Cadence Scholarship Program

The Cadence Scholarship Program is the flagship CSR program of Cadence India, introduced…

• 2 min read
CadenceCares , CadenceScholarshipProgram , cadence , Cadence India

Breakfast Bytes

Sunday Brunch Video for 19th September 2021

https://youtu.be/LuFCfy3aNbI Made with Lumen5 by me Monday: On-Device Artificial…

• less than a min read
sunday brunch

System, PCB, & Package Design 

BoardSurfers: Have You Heard About Computational Fluid Dynamics Yet?

A guest blog to take your focus away from normal news and feature information that…

• 6 min read
CFD , Marine Engineering , Automotive , boundary layer , T-Rex , Aerospace , Pointwise , International Meshing Roundtable , Wind Study , Computational Fluid Dynamics , CFD Vision 2030 , Aviation , NUMECA , adaptation , Noise Reduction , Meshing , Omnis

Breakfast Bytes

HOT CHIPS: The Big Trends

Two big trends that are no surprise, they were big at HOT CHIPS last year and for…

• 5 min read
Memory , deep learning , advanced packaging , hot chips , thermal , AI

Spotlight Taiwan

類比與混合訊號系列線上精選影片，帶領您征服設計挑戰!

Cadence類比與混合訊號系列線上活動已圓滿落幕，在此為您準備精彩視頻重播，集結四場Cadence技術專家開講，深入解析與探討引領業界的類比與混合訊號技術產品…

• less than a min read
analog , Mixed-Signal , Virtuoso , taiwanese blog
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