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Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか？」をテーマに、本田技術研究所社 先進技術研究所（HGRX）との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

Cadence Japan
• less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

Sheryl G
• 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

Corporate
• 7 min read
featured , AI Infra Summit 2025 , AI for design , Cadence Reality Digital Twin Platform , design for AI

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

Corporate
• 4 min read
Edge AI , featured , Ambarella
cdns - all_blogs_categories

Blog - Post List

Latest blogs

Breakfast Bytes

TSMC's 3DFabric

I already wrote about TSMC's advanced-node roadmap in my post TSMC: Advanced Technology…

• 3 min read
CoWoS , packaging , TSMC , TSMC Technology Symposium , InFO , 3dfabric

Computational Fluid Dynamics

This Week in CFD

I hope you didn't think I had forgotten. But last Friday was a tad busy so I didn…

• 1 min read
CFD , Aerospace , Pointwise , Computational Fluid Dynamics , fluid dynamics , CFD Applications , NUMECA , CAE , Mesh Generation , Meshing

Spotlight Taiwan

超大規模資料中心、行動通訊與汽車 推動先進製程節點不斷創新 - 摩爾定律仍加速前行!

原文作者: Cadence資深副總裁暨數位與簽核事業群總經理滕晉慶(Chin-Chi Teng) 原文出處: https://www.linkedin.com/posts…

• less than a min read
3nm , Hyperscalers , Digital Implementation , taiwanese blog

Breakfast Bytes

Hardware Hacking Party Tricks

Toward the end of April, Black Hat ran a webinar Hacking Party Tricks: Techniques…

• 6 min read
security , glitching , blackhat , JTAG

Verification

Webinar: Using e Reflection

Join Cadence Training and Software Architect Efrat Shneydor for this free technical…

• 1 min read
Specman , Specman e , training , webinar , reflection

Breakfast Bytes

Sunday Brunch Video for 6th June 2021

https://youtu.be/sqEzhpQZmbo Made on my dining table (camera me) Monday: Memorial…

• less than a min read
sunday brunch

Breakfast Bytes

A Year of Breakfasts 2021

This year's Breakfast Bytes annual is out. It is titled A Year of Breakfasts 2021…

• 1 min read
a year of breakfasts 2021 , breakfast bytes book , Breakfast Bytes

Computational Fluid Dynamics

Pointwise V18.4 R4 Now Available for Download and Production Use

As the title says, Pointwise Version 18.4 R4 is now available for download and production…

• 1 min read
CFD , Pointwise , Computational Fluid Dynamics , Mesh Generation , Meshing

Analog/Custom Design

Start Your Engines: Modeling Current-Based Port Connections between Electrical and…

In a mixed-signal simulation, the electrical signal modules and real number modeling…

• 5 min read
R2E conversion , real number modeling , AMS , AMS Designer , Start Your Engines , E2R , Mixed-Signal , mixed-signal verification

Breakfast Bytes

TSMC: Advanced Technology for Smartphone and HPC Platforms

Yujun Li, TSMC's director of business development for high-performance computing…

• 3 min read
5G , n5 , n5hpc , n3 , TSMC , HPC , n7 , n7hpc

定制IC芯片设计

Virtuoso Meets Maxwell: 从系统的角度思考—— 行业领先的IC与IC封装设计/验证工具间互操作性的优势

当下大多数的模拟，射频和混合信号设计都要求在不同衬底工艺上集成多颗IC，以达到所需的性能。异构元件集成方法可以帮助设计师实现单片SoC不容易实现的设计结果。与此同时…

• less than a min read
Chinese blog , IC Packaging , Virtuoso Meets Maxwell , Virtuoso RF Solution , Mixed-Signal , Virtuoso Analog Design Environment , Virtuoso , Spectre , Allegro

System, PCB, & Package Design 

BoardSurfers: Voiding Text in Copper Shapes

Almost every PCB design includes different types of shapes, mainly for ground and…

• 3 min read
PCB , 17.4 , BoardSurfers , PCB Editor , 17.4-2019 , PCB design , Allegro PCB Editor , Allegro

Breakfast Bytes

CEO Outlook: "Let's Take Advantage of Our Industry Being in the Spotlight"

The Electronic System Design Alliance CEO Outlook took place on May 16. Bob Smith…

• 13 min read
ESDA , semi , ceo outlook , esd alliance

カスタムIC／ミックスシグナル

Virtuoso Meets Maxwell: Clarity 3Dソルバーでのシミュレーション用にポートを設定する

Virtuoso Meets Maxwell はVirtuoso RFソリューションとVirtuoso MultiTechの機能及びその潜在能力の紹介を目的としたブログの連載です…

• less than a min read
Virtuoso Meets Maxwell , Virtuoso RF Solution , Electromagnetic analysis , ICADVM20.1 , japanese blog , Clarity 3D Solver , Custom IC Design , Virtuoso Layout Suite EXL

Verification

AMBA 5 ACE/AXI Specification Updates and Their Support in Cadence ACE/AXI VIP

As discussed in the previous blog, the AMBA® 5 specification updates introduced several…

• 3 min read
amba5 , ACE5 , AXI5 , Funcional Verification , AMBA Verification IP , System Verification Scoreboard

System, PCB, & Package Design 

CFD: It's More Than an Acronym - Learn More at CadenceLIVE

Excuse me, sir. Are you lost? That's what you might be thinking. Why is this guy…

• 1 min read
CFD , Pointwise , Computational Fluid Dynamics , NUMECA

Breakfast Bytes

Countdown to TSMC Technology Symposium: 7nm, 5nm, 3nm, June 1

Today it is the TSMC 2021 Online North America Technology Symposium (tomorrow for…

• 3 min read
n4 , n3 , TSMC , TSMC Technology Symposium , custom/analog flow , digital full flow

Analog/Custom Design

Virtuoso Meets Maxwell: Defining Ports in EMX Planar 3D Solver

Fast and accurate electromagnetic simulation is becoming critical in a growing number…

• 6 min read
VRF , Virtuoso Meets Maxwell , Virtuoso RF Solution , Virtuoso RF , Electromagnetic analysis , EMX , EM Analyis , RF design , ICADVM20.1 , Custom IC Design , Virtuoso Layout Suite EXL

PCB、IC封装：设计与仿真分析

如何在IC封装设计中告别锐角问题？

本文作者：Tyler Lockman，Cadence Software Architect，于加拿大卡尔顿大学获计算机科学学士学位后，在Cadence Allegro产品部门工作超过20年…

• less than a min read
PCB , IC , Chinese blog , 17.4 , APD , Allegro Package Designer Plus , PCB设计 , 中文 , IC封装 , 锐角 , Allegro
CDNS - Fix Layout Hompage