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The Three Phases of AI Adoption

Artificial intelligence is often discussed as if the industry is moving through a…

Corporate
• 6 min read
featured , infrastructure ai , agentic ai , physical ai , sciences ai

Corporate News

Finding What Truly Moves You: Honoring Alberto Sangiovanni-Vincentelli

"Finding what truly moves you is happiness. Success is measured in the lasting impact…

Corporate
• 2 min read
featured , EDA , Alberto Sangiovanni-Vincentelli , UC Berkeley

Corporate News

Accelerating Drug Discovery with Agentic AI and Computational Science

By Louis Culot, corporate vice president and general manager, Cadence Molecular Sciences…

Corporate
• 3 min read
drug discovery , Cadence Molecular Sciences , featured , agentic ai , NVIDIA

Corporate News

Honda + Cadence = Physical AI (part 2): Where Physical AI Will Be Won

Hello everyone, I'm Atsushi Ogawa, Center Head of HGR. The real challenge of physical…

Corporate
• 8 min read
featured , physical ai , HGR , AI , Honda
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Latest blogs

Cloud

Revolutionizing Chip Design in the Cloud

Cadence OnCloud Managed Cloud Service In today's fast-paced semiconductor industry…

• 1 min read
Managed Cloud , EDA , cloud , cadence cloud , cloud eda

Artificial Intelligence (AI)

Arm and Cadence Showcase AI System Collaboration at AI Infra Summit 2025

At the AI Infra Summit 2025 in Santa Clara, California, Arm's VP of Marketing for…

• 1 min read
artificial intelligence , cadence.ai , AI in chip design , Palladium , AI/ML , ARM , AI

Academic Network

Spotlight: Cornell Custom Silicon Systems

Written by Daniel Kaminski, Cornell Custom Silicon Systems Full Team Lead/Analog…

• 4 min read
ASIC , featured , Cadence Academic Network , pegasus , Virtuoso , Spectre , Innovus , Quantus , IC design

Analog/Custom Design

Virtuoso Studio: A Fresh Look - Redefining Your Design Experience

Virtuoso Studio IC 25.1 brings a modern refreshed interface designed for comfort…

• 2 min read
Virtuoso Studio , Custom IC Design

Verification

Regressions, Coverage Integration, and Verification Closure

Don't miss this opportunity to streamline your verification flow and achieve faster…

• 1 min read
webinar , verification

System, PCB, & Package Design 

Cadence OrCAD X and Allegro X 25.1 Is Now Available

The OrCAD X and Allegro X 25.1 release is now available from Cadence Downloads ,…

• 4 min read
System Capture , OrCAD X Capture , package designer , Allegro X PCB Editor , 25.1 , Topology Workbench , Allegro X Advanced Package Designer , Allegro X Design Platform , Aurora , PCB Editor , OrCAD X OnCloud , PCB design , OrCAD X Presto , OrCAD X , Sigrity , Pulse , allegro x

カスタムIC／ミックスシグナル

Virtuoso Studio がモダンな外観に刷新

Virtuoso Studio IC25.1 で刷新された機能についてご紹介しています。快適性のための Dark Gray テーマ、可読性のための TrueType…

• less than a min read
Virtuoso , japanese blog , Custom IC Design

Verification

Streamlining Digital Front-End Design and Verification with Cadence Tools

Plan, Simulate, and Debug: Streamlining Digital Front-End Design and Verification…

• 1 min read
webinar , xcelium , verification

Digital Design

Accelerating Design Closure with Cadence Certus Closure Solution v25.1

Cadence Certus Closure Solution addresses the challenges of timing closure in advanced…

• 2 min read
learning , training , certus , timing convergence

System, PCB, & Package Design 

Stay Future-Ready with Cadence Licensing and Installation Community Hub

Staying ahead in PCB and IC Package design means being ready for the latest releases…

• 1 min read
PCB , install , license , community forum , Cadence forums , PCB design

Digital Design

Smarter, Longer, Cooler: Low-Power Flow for the Devices That Never Sleep

Cadence’s Innovus Low-Power Flow v25.1 offers a comprehensive solution for implementing…

• 2 min read
digital badge , Low Power , Cadence Online Support , training , Innovus , Power Analysis

Corporate News

Accelerating System Design with Real-Time Simulation, Powered by AI Physics

Rising demand for AI infrastructure is driving faster innovation and smarter use…

• 4 min read
CFD , featured , NVIDIA , accelerated compute , millennium , AI

System, PCB, & Package Design 

Ascent: Training Insights: Smarter Design Reuse with Allegro X System Capture

In today's fast-paced electronics industry, time-to-market is critical. Engineers…

• 3 min read
PCB , System Capture , PCB Editor , Design Reuse , PCB design , Training Insights , ASCENT , Allegro X System Capture

The India Circuit

Story of Preshita Parmar - Cadence Scholarship Program

Preshita Parmar began to shape a life grounded in resilience and self-belief in the…

• 1 min read
CadenceCares , CadenceScholarshipProgram , cadence , Cadence India

Verification

Enhancing PCIe6.0 Performance: Flit Sequence Numbers and Selective NAK Explained

Introduction The Flit Sequence Number is a mechanism introduced in the PCIe 6.0…

• 5 min read
Verification IP , VIP , Flit Sequence Number , PCIe , PCIe 6.0 , flit mode , verification

Digital Design

From Defects to Diagnostics: How DFT Transforms Chip Manufacturing

In today’s semiconductor industry, the complexity of integrated circuits (ICs) is…

• 2 min read
DFT , Chip manufacturing , Genus Synthesis Solution

Analog/Custom Design

Virtuoso Studio IC25.1 ISR2 Now Available

Virtuoso Studio IC25.1 ISR2 production release is now available for download.

• 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement , IC Release Blog , Custom IC Design

SoC and IP

Running Optimized PyTorch Models on Cadence DSPs with ExecuTorch

By Vijay Pawar of Cadence and Matthias Cremon of Meta Introduction Deploying…

• 2 min read
IP , Tensilica , HiFi DSP

Data Center

Innovation in Data Center Design and Operations: Highlights from Thésée Event

The Thésée event brought together key partners like France Télévisions, Thésée, Cadence…

• 5 min read
featured , Thésée Event , data center , Cadence Reality Digital Twin Platform
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