Explore the Cadence Forums to find and exchange in-depth technical information.

Featured

Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
• less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Cadence Japan

ケイデンス、AI設計向け検証IPポートフォリオを強化する新VIP10種を発表

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは…

Cadence Japan
• less than a min read
news story , Verification IP , featured

Cadence Japan

ケイデンス、株式会社ベリフォアを迎え検証サービスの革新を加速

ケイデンスはVerifore社を迎えて、半導体設計・検証サービスの革新を加速。高品質なソリューションで国内外の競争力を強化します。

Cadence Japan
• 2 min read
featured , japanese blog
cdns - all_blogs_categories

Blog - Post List
Latest blogs

System, PCB, & Package Design 

Sigrity and Systems Analysis 2025.1 Release Now Available

The Sigrity and Systems Analysis (SIGRITY/SYSANLS) 2025.1 release is now available…

• 12 min read
XcitePI , amm , OptimizePI , Celsius Studio , Sigrity , Clarity 3D Solver , Layout Workbench , T2B , Clarity 3D Workbench , PowerSI

Analog/Custom Design

Accelerate Standard Cell Placement and Routing Using Virtuoso Layout Suite MXL

Why APR Is Essential for Standard Cell Design In the realm of custom IC design…

• 6 min read
Virtuoso Studio , custom/analog , Advanced Node , Virtuoso , Cadence Education Services , Custom IC Design , IC23.1

Corporate News

Next Steps for the Cadence and SkyWater MPW Service

At Cadence, we are dedicated to nurturing future innovators. Our commitment to education…

• 6 min read
news story , featured , Cadence Academic Network , SKY130

カスタムIC／ミックスシグナル

Virtuoso Studio: Quick Dimension Editingで加速するスマートなオブジェクト作成

このブログではVirtuoso Studio IC25.1でご利用いただける、オブジェクト作成を効率化するQuick Dimension Editing(QDE…

• less than a min read
Virtuoso Studio , Quick Dimension Edit , Virtuoso , Custom IC Design , QDE , Virtuoso Layout Suite , Custom IC , Virtuoso Layout Suite XL

Corporate News

New Ultra-Fast Debug Solution for Palladium Emulation with Verisium Debug

Verification engineers continually report that up to 70% of the total engineering…

• 2 min read
news story , featured , verisium , AI

Digital Design

Multitasking with the Innovus Mixed Placer

Why Software Multitasking Is Brilliant—And Why You Shouldn't Text While Driving …

• 2 min read
EDI , training bytes , Digital Implementation , Innovus

Corporate News

Cadence Recognized as TSMC OIP Partner of the Year at 2025 OIP Ecosystem Forum

The semiconductor industry thrives on collaboration, and few pairings exemplify this…

• 2 min read
featured , cadence , OIP Partner of the Year , AI-Driven Design , TSMC , OIP Award

Cadence Japan

境界を越えて、未来を組み上げろ―ホンダ×ケイデンス

「AIは、物理世界にどう根付いていくのか？」をテーマに、本田技術研究所社 先進技術研究所（HGRX）との対談を通じて、AIと半導体の未来、フィジカルAIの可能性…

• less than a min read
Automotive , featured , physical ai , automotive electronics , japanese blog , AI

Computational Fluid Dynamics

Automate Results Analysis in Fidelity with Python-Based Recording

Key Points Enhanced Reproducibility: Scripting captures the complete post-processing…

• 1 min read
Python , Cadence Fidelity , Python API , Fidelity CFD

Digital Design

AI’m Always With You While Working

Artificial intelligence (AI) is not only just a buzzword today; it also helps us…

• 3 min read
ECO , conformal , Static timing analysis , DFT , online courses , Innovus Implementation System , Gate level simualtion , LEC , STA , Cadence Webinar , Cadence Online Support , Floorplanning , RTL-to-GDSII , verisium , Xcelium Logic Simulator , training , Logic Design , coverage analysis , RTL-to-GDSII FrontEnd , training bytes , RTL-to-GDSII BackEnd , Digital Implementation , implementation , Genus Synthesis Solution , ATPG , Synthesis , RTL Code , signoff , Placement , RTL design , Tempus Timing Signoff Solution , IR drop , vManager , Modus ATPG

SoC and IP

Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet

As AI workloads grow in scale and complexity, networks are challenged to keep up…

• 3 min read
Design IP , featured , 224G-LR , 224G SerDes , UALink , ECOC , Ultra Ethernet

SoC and IP

Accelerate Automotive System Design with Cadence AI-Driven DSPs

The automotive industry is on the brink of a transformative era powered by intelligence…

• 6 min read
Automotive , infotainment , autonomy , In-cabin sensing , lidar , Xtensa CPU , radar , Tensilica , vision , ADAS

Data Center

Join Us for Data Center Technologies at CadenceCONNECT Middle East 2025

The future of data center innovation is converging in Abu Dhabi! Following the success…

• 2 min read
data center , digital twin , cadenceconnect

Analog/Custom Design

Virtuoso Studio Refreshed for Modern Outlook

Our new AI-powered custom design solution, Virtuoso Studio, leverages our 30 years…

• 5 min read
Virtuoso , Custom IC Design

Corporate News

Danfoss Amplifies PCB Design with Cadence Allegro X AI

Danfoss is a Danish family-owned multinational company with a focus on sustainability…

• 1 min read
designed with cadence

Computational Fluid Dynamics

Join the CFD Track at CadenceCONNECT Middle East 2025

Join us for a deep dive into the future of computational fluid dynamics (CFD). Following…

• 2 min read
CFD , cadenceconnect , Aerospace and Defense

SoC and IP

A Hybrid Subsystem Architecture to Elevate Edge AI

The world of artificial intelligence is moving beyond the cloud and into our everyday…

• 4 min read
controller IP , DSP , cadence , NeuroEdge 130 , IoT , Tensilica DSPs , SoC , ip cores , Tensilica , semiconductor IP , AICP

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

• 7 min read
featured , data center , AI Infra Summit 2025 , digital twin , AI for design , Cadence Reality Digital Twin Platform , design for AI , post event insights

SoC and IP

From 12 Hours to 2: How AI Accelerates Automotive Quality Assurance

In the fast-paced world of Industry 4.0, quality assurance (QA) is no longer just…

• 2 min read
Automotive , Regression , Verisium Manager
CDNS - Fix Layout Hompage