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Cadence Japan

プネー拠点設立20周年を迎えるケイデンス、長期的な研究開発へのコミットメントを強化

ケイデンスのプネー拠点は設立20周年。DSP IPやAIアクセラレータなど最先端の半導体IPを開発し、インドの人材育成・半導体戦略を推進。

Cadence Japan
• less than a min read
news story , featured , Cadence Culture , japanese blog

Corporate News

Cadence Celebrates 20 Years in Pune, Reinforces Long-Term R&D Commitment

Cadence, a global leader in electronic system design, is celebrating 20 years in…

Corporate
• 1 min read
news story , featured , Cadence Culture

Cadence Japan

ケイデンス、TSMC N3Pテクノロジーで64Gbps対応UCIe IPソリューションをテープアウト

ケイデンス、第3世代UCIe IPをTSMC N3Pでテープアウト。64Gbps対応でAI/HPC向けマルチダイ設計を加速、業界最高水準の帯域密度を実現。

Cadence Japan
• less than a min read
news story , ucie , featured , chiplets , TSMC N3P

Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog
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Blog - Post List
Latest blogs

Analog/Custom Design

Virtuoso Studio Refreshed for Modern Outlook

Our new AI-powered custom design solution, Virtuoso Studio, leverages our 30 years…

• 5 min read
Virtuoso , Custom IC Design

Corporate News

Danfoss Amplifies PCB Design with Cadence Allegro X AI

Danfoss is a Danish family-owned multinational company with a focus on sustainability…

• 1 min read
designed with cadence

Computational Fluid Dynamics

Join the CFD Track at CadenceCONNECT Middle East 2025

Join us for a deep dive into the future of computational fluid dynamics (CFD). Following…

• 2 min read
CFD , cadenceconnect , Aerospace and Defense

SoC and IP

A Hybrid Subsystem Architecture to Elevate Edge AI

The world of artificial intelligence is moving beyond the cloud and into our everyday…

• 4 min read
controller IP , DSP , cadence , NeuroEdge 130 , IoT , Tensilica DSPs , SoC , ip cores , Tensilica , semiconductor IP , AICP

Corporate News

AI Infra Summit Highlights: Cadence's Unique Design for AI and AI for Design

The AI Infra Summit 2025 was a great experience that left attendees buzzing with…

• 7 min read
featured , data center , AI Infra Summit 2025 , digital twin , AI for design , Cadence Reality Digital Twin Platform , design for AI , post event insights

SoC and IP

From 12 Hours to 2: How AI Accelerates Automotive Quality Assurance

In the fast-paced world of Industry 4.0, quality assurance (QA) is no longer just…

• 2 min read
Automotive , Regression , Verisium Manager

Corporate News

Ambarella Redefines Edge AI Performance with Cadence

Ambarella stands at the forefront of edge AI processing, pioneering low-power, high…

• 4 min read
news story , Edge AI , featured , Ambarella

SoC and IP

Ensuring End-to-End Traceability for Safety-Critical Applications

There is now a direct interface between the Midas Safety Platform and popular requirements…

• 4 min read
Requirement Management System , Safety Solution , DOORS , functional safety , RMS , Safety , Product Lifecycle Management , Safety Analysis , JIRA , Traceability , Jama , Polarion , PLM , Codebeamer , Safety Compliance

Corporate News

Explore Photonics and Quantum Technologies at CadenceCONNECT 2025

The intersection of photonics and quantum computing marks a pivotal moment in advancing…

• 1 min read
Quantum States , featured , cadenceconnect , photonics , Quantum Technology

Verification

Evolution of AMBA AXI Protocol: An Introduction to the Issue L Update

To gain a comprehensive understanding of AMBA® AXI Issue L (AXI-L) protocol update…

• 3 min read
AXI , Verification IP

Verification

An Introduction to AMBA CHI Chip-to-Chip (C2C) Protocol

As chip designs grow larger and more complex, they become increasingly difficult…

• 2 min read
C2C , multi-die , chip-chip , AMBA , CHI VIP , verification

System, PCB, & Package Design 

BoardSurfers: Training Insights: Upskill Engineers using PCB Editor Basic Course

Are you seeking an effective and proven method to onboard and upskill new engineers…

• 4 min read
PCB , PCB Layout and routing , Routing , Allegro X PCB Editor , APD , Constraint Manager , via , PCB design , Allegro PCB Editor , allegro x , Schematic , Allegro

Corporate News

Vaire Computing – Near-Zero Energy Computing for Agentic AI

The demand for AI is on the rise, with agentic AI being the next frontier. However…

• 2 min read
agentic ai , designed with cadence

Analog/Custom Design

Virtuoso Studio IC23.1 ISR16 Now Available

Virtuoso Studio IC23.1 ISR16 production release is now available for download.

• 2 min read
IC 23.1 , Virtuoso Studio , IC Release , Virtuoso , IC Release Blog , Custom IC Design , Custom IC , IC design

Computational Fluid Dynamics

Addressing Secondary Flow Effects in Turbomachinery with Fidelity CFD

Secondary flows cause up to 50% of aerodynamic losses in turbines. This post explores…

• 5 min read
CFD , turbomachinery , Aachen turbine , Fidelity CFD , secondary flow

SoC and IP

Boosting AI Performance with CXL

AI workloads are outpacing traditional memory architectures—but CXL®︎ offers a smarter…

• 3 min read
CXL , Design IP , IP , controller , PCIe

SoC and IP

The Next-Generation UCIe IP Subsystem for Advanced Package Designs

With the rapidly increasing connectivity demands driven by AI/ML and HPC/data center…

• 3 min read
ucie , Design IP , featured , TSMC , die-to-die , HPC , AI

Corporate News

Cadence at the TSMC OIP: Pioneering the Future of Semiconductor Design

The semiconductor industry stands at a pivotal moment. As we push toward more advanced…

• 3 min read
OIP , featured , 3D-IC , 3DIC , TSMC , AI

Analog/Custom Design

Virtuoso Studio: Faster, Smarter Object Creation with Quick Dimension Editing

This blog introduces QDE, a feature that streamlines object creation. Instead of…

• 3 min read
Virtuoso Studio , Quick Dimension Edit , Virtuoso , Custom IC Design , QDE , Virtuoso Layout Suite , Custom IC , Virtuoso Layout Suite XL
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