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Digital Design

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Corporate News

The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed.…

Corporate
• 5 min read
featured , agentic ai , NVIDIA , AI-Driven Design , AI for design

Corporate News

Cadence CEO Outlines the Path to the CMOS 2.0 Era at IMEC ITF World 2026

At this year's ITF World 2026 in Antwerp, Belgium, global technology leaders gathered…

Corporate
• 4 min read
CMOS 2.0 , featured , imec , AI for design , XTCO

Corporate News

Welcoming EMA Design Automation and FlowCAD to Cadence

We're excited to share that the EMA Design Automation and FlowCAD teams have joined…

Corporate
• 2 min read
featured , Ultra Librarian , EMA , System Design and Analysis
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Blog - Post List
Latest blogs

Digital Design

From Concept to Cool: Optimizing Low-Power Design with Genus Synthesis Solution

Join Cadence Training and Education Application Engineer Architect, Neha Joshi ,…

• 2 min read
webinar , Genus Synthesis Solution , online training

Analog/Custom Design

The Cadence SKILL Language: Where Coding Blends with Chip Design

Imagine you're working on a critical design project, and you need a coffee break…

• 8 min read
Cadence blogs , Virtuoso Studio , SKILL for the Skilled , training , digital badges , Layout , Virtuoso , Lisp , Custom IC Design , SKILL++ , Virtuoso Layout Suite , SKILL

Digital Design

Training Insight - Gateway to Smarter Diagnostics with Modus DFT Software

In the rapidly evolving landscape of digital semiconductor design and testing, the…

• 2 min read
DFT , Modus DFT , Test , Modus ATPG

RF Engineering

Efficiently Defining the Fundamental, 2nd and 3rd Harmonics Load Impedances

Defining the 2nd and 3rd harmonics load impedances of an RF/microwave transistor…

• 2 min read
RF Simulation , AWR Design Environment , RF design , harmonic balance , microwave office

The India Circuit

Story of Leela Raghavan - Cadence Scholarship Program

Leela’s story unfolded in a corner of Bangalore—one of quiet strength, profound loss…

• 2 min read
CadenceCares , CadenceScholarshipProgram , cadence , Cadence India

Verification

High-Bandwidth Memory Evolution from First-Generation HBM to the Latest HBM4

HBM4 is the latest generation of the High Bandwidth Memory (HBM) that has become…

• 3 min read
Verification IP , VIP , JEDEC , HBM , hbm4 , DRAM , High Bandwidth Memory , memory models , HBM3 Vs HBM4 , verification

Digital Design

Race to First-Pass RTL: Improve PPA Targets Using Stratus HLS

Traditional RTL design methodologies often fall short in the race to deliver faster…

• 5 min read
High-Level Synthesis , online courses , Cadence training , Stratus , SystemC , online training , HLS , cadence learning and support

Computational Fluid Dynamics

Sailing Through the Waves of Competitive Racing with Fine Marine

Fine Marine's CFD tools enhance performance and efficiency in marine racing design…

• 5 min read
FINE Marine , Computational Fluid Dynamics , vendee globe , Mesh Generation , Americas Cup

SoC and IP

Rethinking AI Infrastructure: The Rise of PCIe Switches

Boring? Think Again. PCIe Switches Are the Hidden Power Behind AI When thinking of…

• 5 min read
controller IP , CXL , PCIe controller , Design IP , PCIe Gen4 , pcie4 , PCIe 7.0 , IP design , PCIe , future of IP , PCIe PHY , PCIe 6.0 , PCI Express

Corporate News

CadenceLIVE India 2025 Recap – Where Inspiration Meets Innovation

On August 13, 2025, CadenceLIVE India 2025 set the stage for a remarkable convergence…

• 2 min read
featured , cadence , AI-Driven Design , cadencelive , AI

Verification

Verification of PCIe's TDISP for Device Interface Security

The TEE Device Interface Security Protocol (TDISP) is a critical component in ensuring…

• 5 min read
Verification IP , Functional Verification , CXL3.0 , PCIe , TDISP , IDE , verification

System, PCB, & Package Design 

BoardSurfers: Training Insights: Learn RF Design with Allegro X RF PCB Course

The Allegro®︎ X RF PCB course offers a practical, one-day training for engineers…

• 3 min read
RF PCB , Allegro X PCB Editor , BoardSurfers , PCB Editor , PCB design , Training Insights , allegro x

System, PCB, & Package Design 

Join Cadence Community Super User Program

Join the Community Super User Program to share expertise, inspire peers, and grow…

• 1 min read
PCB , community forum , PCB design , CADENCEFORUMS

Corporate News

ICSense Designs ASICs for Next-Generation Medical Implants

ICsense is a leading supplier of application-specific integrated circuits (ASICs…

• 2 min read
spectre simulation , Virtuoso Studio , Xcelium Logic Simulator , designed with cadence , Voltus

Analog/Custom Design

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

• 1 min read
IC25.1 , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement , IC Release Blog , Custom IC Design , Cadence Community

SoC and IP

Cadence Drives Next-Gen Memory and Connectivity at FMS 2025

As AI data centers continue to scale up and out to accommodate increasingly compute…

• 1 min read
PCIe controller , ucie , HBM , PCIe 7.0 , PCIe , DDR IP , UALink , PCIe 6.0 , PCI Express

Digital Design

Enhancing RTL Power Efficiency with xReplay, FlashReplay, and Clock Gating

Innovative Solutions for Power-Efficient RTL Design and Technology As semiconductor…

• 6 min read
digital badge , Low Power , Power-Efficient Design , Joules , training , training bytes , Power Analysis , online training , clock gating , RTL analysis

Verification

An Overview of CXL Mode Alternate Protocol Negotiation

The Peripheral Component Interconnect Express (PCIe) protocol has a very powerful…

• 4 min read
CXL , Verification IP , VIP , PCIe , verification

Corporate News

3D-ICs in the Automotive Market: Breaking Barriers with AI-Driven EDA Tools

The automotive industry is experiencing a significant transformation as it adopts…

• 6 min read
Automotive , chip design , 3D-IC , automotive electronics , integrity 3d-ic , indesign , jedai , AI
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