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After finishing my webinar on synthesis to timing signoff flow, including the AI features discussed during the session, I received the following questions:

"I missed the webinar. Do you have the recording?"

“I work on implementation. I missed joining and learn about AI features in Innovus. Can I access the webinar later?"

“I have a glitch due to my Wi-Fi connection. Can you share the recording,…

Modern power delivery network (PDN) design poses numerous challenges. Traditionally, designers rely on target impedance analysis—a widely used and effective starting point for ensuring power integrity (PI). While its simplicity and historical success make it appealing, in today's high-speed, high-density systems, its limitations are becoming more apparent with faster transistor switching and increased current demands…

In a computer system, both the GPU as well as the monitor have a certain rate at which they render or update an image, respectively. The rate is nothing but the frequency at which the image is refreshed (updated in the image it shows/displays), usually expressed in hertz, and can vary based on the content displayed on the screen.

Ensuring a functional power distribution network (PDN) for chips, packages, and PCBs is a challenge for system design engineers facing increasingly difficult design targets and varying design and hardware delivery dates. A CadenceLIVE 2025 presentation is now available on demand that examines work done as part of Project Kuiper, Amazon's low Earth orbit satellite broadband network with a mission to deliver fast, reliable…

Non-volatile memories like Nand Flash are key components of most modern system-on-chip (SoC). The I/O speeds and bandwidth of these types of memories are seeing tremendous improvements and advances in the underlying technology are making them increasingly used for a large variety of applications. These applications rely on not just the high density that traditionally has been the main benefit of flash memories, but throughput…

Compute Express Link (CXL) is revolutionizing data center architecture, with power management emerging as a key area of innovation. Among its power-saving mechanisms, the L0p (Low Power) state plays a pivotal role in reducing energy consumption during periods of low link activity. But what exactly does L0p mean for a CXL link, and how can we ensure its reliable implementation through comprehensive verification?

Did you miss the “Introduction to Low-Power Optimization with Genus Synthesis Solution” webinar because your Wi-Fi thought it was a low-power device and took a nap? Or maybe you left halfway through because your dog scheduled a surprise Zoom call with the neighbour’s cat? Or perhaps you just wanted to see if anyone would notice your dramatic exit (spoiler: we noticed, and we’re still talking about it).…