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Analog/Custom Design

Virtuoso Studio IC25.1 ISR3 Now Available

Virtuoso Studio IC25.1 ISR3 production release is now available for download.

KomalJohar
• 4 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Announcement blog

Corporate News

Cadence Tapes Out UCIe IP Solution at 64G Speeds on TSMC N3P Technology

Delivering the next wave of chiplet innovation, Cadence has successfully taped out…

Corporate
• 2 min read
news story , ucie , featured , chiplets , TSMC N3P

Cadence Japan

業界初、エッジAI・AI搭載PC向けeUSB2V2エンドツーエンドデモをCESで公開

CES 2026で業界初のeUSB2V2エンドツーエンドデモを公開。AI PCやエッジAI向けの省電力・高速伝送を実現する最新USB技術の詳細をご紹介します。

Cadence Japan
• less than a min read
news story , eUSB2v2 , Edge AI , Design IP , featured

Corporate News

Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES

Since their debut in 2023, AI PCs have taken the market by storm. Gartner projects…

Corporate
• 4 min read
news story , eUSB2v2 , Edge AI , Design IP , featured
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Corporate News

2.5D vs 3D-IC: Architecture Tradeoffs, and a Practical Selection

As traditional scaling slows and multi-die integration becomes the new engine of…

• 5 min read
architecture , 3D-IC , advanced packaging , vertical stacking , 3D-IC Technology , 2.5D

Computational Fluid Dynamics

Reduce Noise and Improve Fan Performance with Serrated Edges

Understanding Noise Reduction in Industrial Fans Industrial fans are widely utilized…

• 4 min read
CFD , fan performance , turbomachinery , serrated edges , Industrial Fans , simulation software

Corporate News

Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs

Cadence has unveiled 10 Verification IP (VIP) for key emerging interfaces tuned for…

• 1 min read
news story , Verification IP , featured

カスタムIC／ミックスシグナル

Virtuoso Studio: 快適な作業環境 - 新しいディスプレイテーマや可読性の向上

これは、Virtuoso Studio IC 25.1のリフレッシュに関する5部構成のブログシリーズの第2弾です。IC設計における日々の作業をより快適で目に優しいものにするため…

• 1 min read
Cadence blogs , Virtuoso Studio , japanese blog , Custom IC Design

The India Circuit

Story of Suraj Gaur - Cadence Scholarship Program

In the bustling lanes of Faridabad, just beyond Delhi’s metroscape, Suraj Gaur quietly…

• 1 min read
CadenceCares , CadenceScholarshipProgram , cadence , Cadence India

Verification

Powering Up Efficiency: A Deep Dive into CXL L0p and its Verification

Compute Express Link (CXL) is revolutionizing data center architecture, with power…

• 3 min read
CXL , performance , Verification IP , Functional Verification , coherent , l0p

Digital Design

From FOMO to PPA: Catch Up on Low-Power Design with Genus Synthesis Solution!

Did you miss the “ Introduction to Low-Power Optimization with Genus Synthesis Solution…

• 3 min read
low-power technique , webinar , optimization , training bytes , Genus Synthesis Solution , online training , Training Webinar

Computational Fluid Dynamics

Making Every RPM Count with Fidelity CFD

As the need for miniaturization, efficiency, and accelerated design processes intensifies…

• 4 min read
CFD , Fidelity Autogrid , Fidelity Optimization , turbomachinery , ENTECHMACH

Corporate News

3D-IC Design Tools: Cadence Workflows for Planning, Assembly, and Analysis

3D-IC design tools are becoming increasingly essential as the industry transitions…

• 6 min read
celsius , Virtuoso Studio , Tempus , Integrity 3D-IC Platform , 3D-IC , Voltus , Sigrity , Innovus Implementation , Allegro , clarity

Analog/Custom Design

Virtuoso Studio: Viewing Designs Clearly - Understanding LPP Transparency

Virtuoso Studio introduces LPP Transparency—a feature that gives you clearer visibility…

• 3 min read
Cadence blogs , Virtuoso Studio , Custom IC Design , Custom IC

Corporate News

Cadence, NVIDIA, and Solar Turbines Collaborate on AI Physics

Accelerated computing and advanced simulation technologies are changing the game…

• 4 min read
CFD , LLM , ai physics , model , simulation

Corporate News

What Is 3D-IC Technology? Fundamentals, Architecture, and Design Concepts

As process nodes continue to advance into the sub-micron era, the limitations of…

• 4 min read
Integrity 3D-IC Platform , chiplet , 3D-IC , advanced packaging , vertical stacking , 3D-IC Technology

Cadence Japan

ケイデンス、ChipStack社を迎えAI駆動型のチップ設計・検証を加速

ケイデンスはChipStack社を迎えることで、エージェント型AIソリューションを強化します。生成AI駆動型プラットフォームとXcelium、Jasperの統合により…

• less than a min read
agentic ai , Xcelium Logic Simulator , AI-Driven Verification , japanese blog

Corporate News

Jasper User Group 2025: A Recap of Innovations and Insights

The Jasper User Group 2025, the annual must-attend event for the formal community…

• 3 min read
Jasper User Group , Jasper Formal Verification Platform , GenAI , verification

Verification

Demystifying CXL Memory Interleaving and HDM Decoder Configuration

Memory interleaving is a technique that distributes memory addresses across multiple…

• 5 min read
CXL , Verification IP , VIP , PCIe

Verification

Demystifying Forward Error Correction (FEC) in PCIe 6.0

Introduction As the industry continues to progress in PCIe, enabling faster and…

• 3 min read
Verification IP , PCIe 6.0 , PCI Express , verification , TripleCheck

カスタムIC／ミックスシグナル

Virtuoso Studio: 新たな視点 - 設計経験を再定義する

本ブログは、5回にわたるブログシリーズの第1回目です。IC25.1 Virtuoso Studio に追加されたエキサイティングなアップデートを順にご紹介していきます…

• less than a min read
Virtuoso Studio , japanese blog , Custom IC Design

Corporate News

Fortune & Great Place To Work Name Cadence to 2025 World’s Best Workplaces List

Great Place To Work® and Fortune magazine have honored Cadence as one of the Fortune…

• 2 min read
news story , Culture , featured

SoC and IP

From Spec to Silicon: Successful Physical AI System Chiplet Bring-Up

The semiconductor industry is advancing at an unprecedented pace, driven by the need…

• 7 min read
ucie , IP , chiplets , physical ai , lpddr5x , ARM , AI
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